MP8719 – 26V, 12A, HIGH-CURRENT, SYNC BUCK CONVERTER WITH ±1A LDO

MP8719 Rev1.01

www.MonolithicPower.com

6

8/3/2017

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PIN FUNCTIONS

PIN #

Name

Description

1

VIN

Supply voltage. VIN supplies power for the internal MOSFET and regulators. The

MP8719 operates from a +4.5V to +26V input rail. An input capacitor is needed to

decouple the input rail. Use wide PCB traces and multiple vias to make the connection.

2

PGND

Power ground. Use wide PCB traces and multiple vias to make the connection.

3

3V3

External 3V3 VCC input for control and driver. Place a 1µF decoupling capacitor

close to 3V3 and AGND. It is recommended to form an R-C filter.

4

AGND

Analog ground. The internal reference is referred to AGND. Connect GND of the FB

divider resistor to AGND for better load regulation.

5

VTT

VTT LDO output. Decouple with a minimum 22µF ceramic capacitor as close to VTT

as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for

their stable temperature characteristics.

6

VDDQ

Connect VDDQ to the output capacitor of the regulator directly with a thick (>100mil)

trace.

7

VTTREF

Buffered VTT reference output. Decouple VTTREF with a minimum 0.22µF ceramic

capacitor as close to it as possible. X7R or X5R grade dielectric ceramic capacitors are

recommended for their stable temperature characteristics.

8

VTTS

VTT output sense. Connect VTTS to the output capacitor of the VTT regulator directly.

9

SW

Switch output. Connect SW to the inductor and bootstrap capacitor. SW is connected

to VIN when the HS-FET is on. SW is connected to PGND when the LS-FET is on. Use

wide and short PCB traces to make the connection. SW is noisy, so keep sensitive

traces away from SW.

10

BST

Bootstrap. A capacitor connected between SW and BST is required to form a floating

supply across the high-side switch driver.

11

OTW

Over-temperature status. OTW is used to indicate that the MP8719 is close to OTP.

OTW is pulled low once the junction temperature is higher than the over-temperature

warning threshold. OTW can be left open if not used.

12

PG

Power good output. PG is an open-drain signal. PG is high if the output voltage is

within a proper range.

13

FB

Feedback. An external resistor divider from the output to GND (tapped to FB) sets the

output voltage. Place the resistor divider as close to FB as possible. Avoid vias on the

FB traces.

14

MODE

Switching frequency and ultrasonic mode selection. A 1% pull-down resistor is

needed on MODE.

15

EN2

Enable. EN1 and EN2 are digital inputs which are used to enable or disable the

internal regulators. Once EN1 = EN2 = 1, the VDDQ regulator, VTT LDO, and VTTREF

output are turned on. When EN1 = 0 and EN2 = 1, all the regulators are on except VTT

LDO. All regulators are turned off when EN2 = 0 or EN1 = EN2 = 0. Do not float EN1 at

any time. If the VTT LDO function is not used, tie EN1 to GND.

16

EN1