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CYUSB302X датащи(PDF) 15 Page - Cypress Semiconductor |
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CYUSB302X датащи(HTML) 15 Page - Cypress Semiconductor |
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15 / 34 page ![]() Document Number: 001-55190 Rev. *L Page 15 of 34 CYUSB302x AC Timing Parameters Storage Port Timing The S0-Port and S1-Port support the MMC Specification Version 4.4 and SD Specification Version 3.0. Table 9 lists the timing parameters for S0-Port and S1-Port of SD3. Table 9. S-Port Timing Parameters[3] Parameter Description Min Max Units MMC-20 tSDIS CMD Host input setup time for CMD 4.8 – ns tSDIS DAT Host input setup time for DAT 4.8 – ns tSDIH CMD Host input hold time for CMD 4.4 – ns tSDIH DAT Host input hold time for DAT 4.4 – ns tSDOS CMD Host output setup time for CMD 5 – ns tSDOS DAT Host output setup time for DAT 5 – ns tSDOH CMD Host output hold time for CMD 5 – ns tSDOH DAT Host output hold time for DAT 5 – ns tSCLKR Clock rise time – 2 ns tSCLKF Clock fall time – 2 ns tSDCK Clock cycle time 50 – ns SDFREQ Clock frequency 20 MHz tSDCLKOD Clock duty cycle 40 60 % MMC-26 tSDIS CMD Host input setup time for CMD 10 – ns tSDIS DAT Host input setup time for DAT 10 – ns tSDIH CMD Host input hold time for CMD 9 – ns tSDIH DAT Host input hold time for DAT 9 – ns tSDOS CMD Host output setup time for CMD 3 – ns tSDOS DAT Host output setup time for DAT 3 – ns tSDOH CMD Host output hold time for CMD 3 – ns tSDOH DAT Host output hold time for DAT 3 – ns tSCLKR Clock rise time – 2 ns tSCLKF Clock fall time – 2 ns tSDCK Clock cycle time 38.5 – ns SDFREQ Clock frequency 26 MHz tSDCLKOD Clock duty cycle 40 60 % MC-HS tSDIS CMD Host input setup time for CMD 4 – ns tSDIS DAT Host input setup time for DAT 4 – ns tSDIH CMD Host input hold time for CMD 3 – ns tSDIH DAT Host input hold time for DAT 3 – ns tSDOS CMD Host output setup time for CMD 3 – ns tSDOS DAT Host output setup time for DAT 3 – ns |
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