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Document Number: 001-87220 Rev. *J

Page 11 of 43

PSoC® 4: PSoC 4100 Family

Datasheet

The following is the pin-list for the PSoC 4100 (35-WLCSP).

35-Ball CSP

Alternate Functions for Pins

Pin Description

Name

Analog

Alt 1

Alt 2

Alt 3

Alt 4

P2.2

sarmux.2

–

Port 2 Pin 2: gpio, lcd, csd, sarmux

P2.3

sarmux.3

–

Port 2 Pin 3: gpio, lcd, csd, sarmux

P2.4

sarmux.4

tcpwm0_p[1]

–

Port 2 Pin 4: gpio, lcd, csd, sarmux, pwm

P2.5

sarmux.5

tcpwm0_n[1]

–

Port 2 Pin 5: gpio, lcd, csd, sarmux, pwm

P2.6

sarmux.6

tcpwm1_p[1]

–

Port 2 Pin 6: gpio, lcd, csd, sarmux, pwm

P2.7

sarmux.7

tcpwm1_n[1]

–

Port 2 Pin 7: gpio, lcd, csd, sarmux, pwm

P3.0

–

tcpwm0_p[0]

scb1_uart_rx[0] scb1_i2c_scl[0]

scb1_spi_mosi[0] Port 3 Pin 0: gpio, lcd, csd, pwm, scb1

P3.1

–

tcpwm0_n[0]

scb1_uart_tx[0] scb1_i2c_sda[0] scb1_spi_miso[0] Port 3 Pin 1: gpio, lcd, csd, pwm, scb1

P3.2

–

tcpwm1_p[0]

–

swd_io[0]

scb1_spi_clk[0]

Port 3 Pin 2: gpio, lcd, csd, pwm, scb1, swd

VSS

–

Ground

P3.3

–

tcpwm1_n[0]

–

swd_clk[0]

scb1_spi_ssel_0[0] Port 3 Pin 3: gpio, lcd, csd, pwm, scb1, swd

P3.4

–

tcpwm2_p[0]

–

scb1_spi_ssel_1 Port 3 Pin 4: gpio, lcd, csd, pwm, scb1

P4.0

–

scb0_uart_rx

scb0_i2c_scl

scb0_spi_mosi

Port 4 Pin 0: gpio, lcd, csd, scb0

P4.1

–

scb0_uart_tx

scb0_i2c_sda

scb0_spi_miso

Port 4 Pin 1: gpio, lcd, csd, scb0

P4.2

csd_c_mod

–

scb0_spi_clk

Port 4 Pin 2: gpio, lcd, csd, scb0

P4.3

csd_c_sh_tank

–

scb0_spi_ssel_0 Port 4 Pin 3: gpio, lcd, csd, scb0

P0.0

comp1_inp

–

scb0_spi_ssel_1 Port 0 Pin 0: gpio, lcd, csd, scb0, comp

P0.1

comp1_inn

–

scb0_spi_ssel_2 Port 0 Pin 1: gpio, lcd, csd, scb0, comp

P0.2

comp2_inp

–

scb0_spi_ssel_3 Port 0 Pin 2: gpio, lcd, csd, scb0, comp

P0.3

comp2_inn

–

Port 0 Pin 3: gpio, lcd, csd, comp

P0.4

–

scb1_uart_rx[1] scb1_i2c_scl[1]

scb1_spi_mosi[1] Port 0 Pin 4: gpio, lcd, csd, scb1

P0.5

–

scb1_uart_tx[1] scb1_i2c_sda[1] scb1_spi_miso[1] Port 0 Pin 5: gpio, lcd, csd, scb1

P0.6

–

ext_clk

–

scb1_spi_clk[1]

Port 0 Pin 6: gpio, lcd, csd, scb1, ext_clk

P0.7

–

wakeup

scb1_spi_ssel_0[1] Port 0 Pin 7: gpio, lcd, csd, scb1, wakeup

XRES

–

Chip reset, active low

VCCD

–

Regulated supply, connect to 1µF cap or 1.8V

VDD

–

Supply, 1.8 - 5.5V

P1.0

ctb.oa0.inp

tcpwm2_p[1]

–

Port 1 Pin 0: gpio, lcd, csd, ctb, pwm

P1.1

ctb.oa0.inm

tcpwm2_n[1]

–

Port 1 Pin 1: gpio, lcd, csd, ctb, pwm

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