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MB39C014 датащи(PDF) 27 Page - Cypress Semiconductor |
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MB39C014 датащи(HTML) 27 Page - Cypress Semiconductor |
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27 / 32 page ![]() Document Number: 002-08361 Rev. *C Page 27 of 32 MB39C014 12. Application Circuit Examples 12.1 Application Circuit Example 1 ■ An external voltage is input to the reference voltage external input (VREFIN) , and the VOUT voltage is set to 2.97 times the VOUT setting gain. 12.2 Application Circuit Example 2 ■ The voltage of VREF pin is input to the reference voltage external input (VREFIN) by the dividing resistors. The VOUT voltage is set to 2.5 V. VOUT = 2.97 × VREFIN VIN CPU VOUT APLI C2 C1 L1 R5 DAC 4.7 μF 4.7 μF 2.2 μH 1 M Ω VDD CTL FSEL VREF VREFIN GND LX OUT POWER GOOD MODE L (OPEN) = 2.0 MHz H = 3.2 MHz 10 3 8 5 9 1 6 4 7 2 VOUT = 2.97 × VREFIN VOUT = 2.97 × (VREF = 1.20 V) VREFIN = R4 R3 + R4 R4 300 k Ω VDD CTL FSEL VREF VREFIN GND LX OUT POWER GOOD MODE 10 3 8 5 9 1 6 4 7 2 L (OPEN) = 2.0 MHz R3 127.5 k Ω H = 3.2 MHz VOUT APLI C1 L1 4.7 μF 2.2 μH (120 kΩ + 7.5 kΩ) CPU R5 1 M Ω VIN C2 4.7 μF × VREF × 1.20 V = 2.5 V 300 k Ω 127.5 k Ω + 300 kΩ |
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