LTC6915

15

6915f

PACKAGE DESCRIPTIO

GN16 (SSOP) 0502

12

3

4

5

6

7

8

.229 – .244

(5.817 – 6.198)

.150 – .157**

(3.810 – 3.988)

16 15 14 13

.189 – .196*

(4.801 – 4.978)

12 11 10 9

.016 – .050

(0.406 – 1.270)

.015

± .004

(0.38

± 0.10)

× 45°

0

° – 8° TYP

.007 – .0098

(0.178 – 0.249)

.053 – .068

(1.351 – 1.727)

.008 – .012

(0.203 – 0.305)

.004 – .0098

(0.102 – 0.249)

.0250

(0.635)

BSC

.009

(0.229)

REF

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.150 – .165

.0250 TYP

.0165

±.0015

.045

±.005

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

INCHES

(MILLIMETERS)

NOTE:

1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

GN Package

16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

4.00

±0.10

(2 SIDES)

3.00

±0.10

(2 SIDES)

NOTE:

1. DRAWING PROPOSED TO BE A VARIATION OF VERSION

(WGED) IN JEDEC PACKAGE OUTLINE M0-229

2. ALL DIMENSIONS ARE IN MILLIMETERS

0.38

± 0.10

BOTTOM VIEW—EXPOSED PAD

1.70

± 0.10

(2 SIDES)

0.75

±0.05

R = 0.115

TYP

R = 0.20

TYP

0.25

± 0.05

3.30

±0.10

(2 SIDES)

1

6

12

7

0.50

BSC

PIN 1

NOTCH

PIN 1

TOP MARK

0.200 REF

0.00 – 0.05

(UE12/DE12) DFN 0802

0.25

± 0.05

3.30

±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.70

±0.05

(2 SIDES)

2.24

±0.05

0.50

BSC

0.58

±0.05

3.40

±0.05

PACKAGE

OUTLINE

3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

4. EXPOSED PAD SHALL BE SOLDER PLATED

DE/UE Package

12-Lead Plastic DFN (4mm

× 3mm)

(Reference LTC DWG # 05-08-1695)

SHDN

HOLD_THRU

CS

CLK

OUT

SENSE

REF

NC

PAR_SER

DGND

LTC6915

#1

–5V

–5V

µP

(TTL

LEVELS)

DATA

SELECT

CLOCK

0.1

µF

0.1

µF

5V

SHDN

HOLD_THRU

CS

CLK

OUT

SENSE

REF

NC

PAR_SER

DGND

LTC6915

#2

–5V

–5V

0.1

µF

0.1

µF

5V

200

Ω

200

Ω

6915 F06

Figure 6. A 2:1 Multiplexing Two LTC6915’s

with Daisy Chained Gain Control

Multiplexing Two LTC6915’s

Send a gain code of 0000 to one IC to set its output to a high

impedance state and send a gain code other than 0000 to

the second IC to set it for normal amplification. If both

devices are ON, the 200

Ω resistors protect the outputs.

The sense pin connection maintains gain accuracy for

loads 1k or greater.

TYPICAL APPLICATIO

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.