Description
The TC518129B is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129B utilizes
a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power storage. The
TC518129B operates from a single 5V power supply. Refreshing is supported by a refresh (RFSH) input which enables two types of
refreshing - auto refresh and self refresh. The TC518129B features a static RAM-like interface with a write cycle in which the input
data is written into the memory cell at the rising edge of RWW thus simplifying the microprocessor interface.
A CS standby mode interface is incorporated in the TC5181298 family, with the CE2 pin in the TC518128B family changed to a
CS pin. The TC5181298 is available in a 32-pin, 0.6 inch and 0.3 inch width plastic DIP, a small outline plastic flat package, and a 32-
pin thin small outline plastic package (forward type).

Features
Organization: 131,072 words x 8 bits
Single 5V power supply
• Fast access time
ICEA CE Access Time
TOEA OE Access Time
tac Cycle Time
Power Dissipation
Self Refresh Current
TC5181298 Family
-70
-80
70ns
80ns
25ns
30ns
115ns
130ns
385mW 330mW
- TC518129BPL
- TC518129BFL
- TC518129BSPL
TC518129BFWL
TC518129BFTL.
200μA (L version)
50μA (LL version)
Auto refresh is supported by an internal refresh address
counter
• Self refresh is supported by an internal timer
• Inputs and outputs TTL compatible
• Refresh: 512 refresh cycles/8ms
• Auto refresh power down feature
• Package
-10
100ns
40ns
160ns
275mW
: DIP32-P-600
: SOP32-P-450
: DIP32-P-300
: SOP32-P-525
: TSOP32-P-0820