MIC280

Micrel

MIC280

4

November 2004

Symbol

Parameter

Condition

Min

Typ

Max

Units

Serial Data I/O Pin, DATA

Low Output Voltage, Note 4

0.3

V

0.5

V

Low Input Voltage

0.8

V

High Input Voltage

2.1

5.5

V

Input Capacitance

Note 5

10

pF

Input Current

±1

µ

A

Serial Clock Input, CLK

Low Input Voltage

0.8

V

High Input Voltage

2.1

5.5

V

Input Capacitance

Note 5

10

pF

Input Current

±1

µ

A

Interrupt Output, /INT

Low Output Voltage, Note 4

0.3

V

0.5

V

Interrupt Propagation Delay

from TEMPx < TLOWx or

ms

Notes 5, 6

TEMPx > THIGHx or TEMPx >

Interrupt Reset Propagation Delay

from read of STATUS or A.R.A. to

1

µ

s

Note 5, 9

±1

µ

A

Serial Interface Timing

CLK (Clock) Period

2.5

µs

Data In Setup Time to CLK High

100

ns

Data Out Stable after CLK Low

300

ns

Data Low Setup Time to CLK Low

Start Condition

100

ns

Data High Hold Time after CLK

Stop Condition

100

ns

High

Bus Timeout

25

30

35

ms

Note 1. Exceeding the absolute maximum rating may damage the device.

Note 3. Devices are ESD sensitive. Handling precautions recommended.

Note 4. Current into the /INT or DATA pins will result in self heating of the device. Sink current should be minimized for best accuracy.

Note 5. Guaranteed by design over the operating temperature range. Not 100% production tested.

are performed and the device status updated; Status bits will be set and /INT driven active, if applicable.

Note 9. The interrupt reset propogation delay is dominated by the capacitance on the bus.

Note 11. Tested at 10-bit resolution.