AD7667AST datasheet(19/29 Pages) AD

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AD7667

Rev. 0 | Page 18 of 28

TYPICAL CONNECTION DIAGRAM

Figure 26 shows a typical connection diagram for the AD7667.

Analog Input

Figure 27 shows an equivalent circuit of the input structure of

the AD7667.

The two diodes, D1 and D2, provide ESD protection for the

analog inputs IN and INGND. Care must be taken to ensure

that the analog input signal never exceeds the supply rails by

more than 0.3 V. This will cause these diodes to become

forward-biased and start conducting current. These diodes can

handle a forward-biased current of 100 mA maximum. For

instance, these conditions could eventually occur when the

input buffer’s (U1) supplies are different from AVDD. In such a

case, an input buffer with a short-circuit current limitation can

be used to protect the part.

OR INGND

AGND

AVDD

Figure 27. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the differen-

tial signal between IN and INGND. Unlike other converters,

INGND is sampled at the same time as IN. By using this

differential input, small signals common to both inputs are

rejected, as shown in Figure 28, which represents the typical

CMRR over frequency with on-chip and external references.

For instance, by using INGND to sense a remote signal ground,

ground potential differences between the sensor and the local

ADC ground are eliminated.

100

1000

10000

FREQUENCY (kHz)

EXT REF

REF

Figure 28. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog

input IN can be modeled as a parallel combination of capacitor

C1 and the network formed by the series connection of R1 and

C2. C1 is primarily the pin capacitance. R1 is typically 168 Ω

and is a lumped component made up of some serial resistors

and the on resistance of the switches. C2 is typically 60 pF and

is mainly the ADC sampling capacitor. During the conversion

phase, where the switches are opened, the input impedance is

limited to C1. R1 and C2 make a 1-pole low-pass filter that

reduces undesirable aliasing effect and limits the noise.

When the source impedance of the driving circuit is low, the

AD7667 can be driven directly. Large source impedances

signifcantly affect the ac performance, especially total harmonic

distortion (THD). The maximum source impedance depends

on the amount of THD that can be tolerated. The THD

degrades as a function of the source impedance and the

maximum input frequency, as shown in Figure 29.

–110

–100

–90

–80

–70

–60

–50

100

1000

INPUT FREQUENCY (kHz)

RS = 20Ω

RS = 500Ω

RS = 50Ω

RS = 100Ω

Figure 29. THD vs. Analog Input Frequency and Source Resistance

Driver Amplifier Choice

Although the AD7667 is easy to drive, the driver amplifier

needs to meet the following requirements:

•

The driver amplifier and the AD7667 analog input circuit

must be able to settle for a full-scale step of the capacitor

array at a 16-bit level (0.0015%). In the amplifier’s data

sheet, settling at 0.1% to 0.01% is more commonly speci-

fied. This could differ significantly from the settling time at

a 16-bit level and should be verified prior to driver

selection. The tiny op amp AD8021, which combines ultra

low noise and high gain-bandwidth, meets this settling

time requirement even when used with gains up to 13.

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