AD2S1205 datasheet(18/21 Pages) AD

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AD2S1205

Rev. A | Page 17 of 20

CIRCUIT DYNAMICS

LOOP RESPONSE MODEL

ERROR

(ACCELERATION)

–

θIN

θOUT

VELOCITY

k1 × k2

1 – z–1

1 – bz–1

1 – z–1

1 – az–1

Sin/Cos LOOKUP

Figure 11. RDC System Response Block Diagram

The RDC is a mixed-signal device that uses two ADCs to

digitize signals from the resolver and a Type II tracking loop

to convert these to digital position and velocity words.

The first gain stage consists of the ADC gain on the Sin/Cos

inputs and the gain of the error signal into the first integrator.

The first integrator generates a signal proportional to velocity.

The compensation filter contains a pole and a zero that are used

to provide phase margin and reduce high frequency noise gain.

The second integrator is the same as the first and generates the

position output from the velocity signal. The Sin/Cos lookup has

unity gain. The values for each section are as follows:

ADC gain parameter (k1NOM = 1.8/2.5)

)

(

)

(

REF

k2 =

(12)

Error gain parameter

(13)

Compensator zero coefficient

4096

4095

(14)

Compensator pole coefficient

4096

4085

(15)

Integrator gain parameter

000

096

(16)

INT1 and INT2 transfer function

)

(

−

(17)

Compensation filter transfer function

)

(

−

(18)

R2D open-loop transfer function

)

(

)

(

)

(

(19)

R2D closed-loop transfer function

)

(

)

(

)

(

(20)

The closed-loop magnitude and phase responses are that of a

second-order low-pass filter (see Figure 12 and Figure 13).

To convert G(z) into the s-plane, an inverse bilinear transfor-

mation is performed by substituting the following equation

for z:

−

(21)

where t is the sampling period (1/4.096 MHz ≈ 244 ns).

Substitution yields the open-loop transfer function G(s).

)

(

)

(

)

(

)

(

)

(

)

(

−

(22)

This transformation produces the best matching at low frequencies

(f < fSAMPLE). At such frequencies (within the closed-loop bandwidth

of the AD2S1205), the transfer function can be simplified to

)

(

≅

(23)

where:

−

)

(

)

(

)

(

)

(

)

(

Solving for each value gives t1 = 1 ms, t2 = 90 μs, and Ka ≈ 7.4 ×

106 s−2. Note that the closed-loop response is described as

)

(

)

(

)

(

(24)

By converting the calculation to the s-domain, it is possible to

quantify the open-loop dc gain (Ka). This value is useful to

calculate the acceleration error of the loop (see the Sources of

Error section).

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