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FDMS9409L датащи(PDF) 2 Page - ON Semiconductor |
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FDMS9409L датащи(HTML) 2 Page - ON Semiconductor |
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2 / 8 page ![]() October 2016 ©2016 Fairchild Semiconductor Corporation FDMS9409L_F085 Rev. 1.0 www.fairchildsemi.com 1 FDMS9409L_F085 N-Channel Logic Level PowerTrench® MOSFET 40 V, 65 A, 2.8 m Ω Features Typical RDS(on) = 2.3 mΩ at VGS = 10V, ID = 65 A Typical Qg(tot) = 47 nC at VGS = 10V, ID = 65 A UIS Capability RoHS Compliant Qualified to AEC Q101 Applications Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Electronic Steering Integrated Starter/Alternator Distributed Power Architectures and VRM Primary Switch for 12V Systems MOSFET Maximum Ratings TJ = 25°C unless otherwise noted. Symbol Parameter Ratings Units VDSS Drain-to-Source Voltage 40 V VGS Gate-to-Source Voltage ±20 V ID Drain Current - Continuous (VGS=10) (Note 1) TC = 25°C 65 A Pulsed Drain Current TC = 25°C See Figure 4 EAS Single Pulse Avalanche Energy (Note 2) 81 mJ PD Power Dissipation 100 W Derate Above 25oC0.67 W/oC TJ, TSTG Operating and Storage Temperature -55 to + 175 oC RθJC Thermal Resistance, Junction to Case 1.5 oC/W RθJA Maximum Thermal Resistance, Junction to Ambient (Note 3) 50 oC/W Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS9409L FDMS9409L_F085 Power56 13” 12mm 3000units Notes: 1: Current is limited by bondwire configuration. 2: Starting TJ = 25°C, L = 60μH, IAS = 52A, VDD = 40V during inductor charging and VDD = 0V during time in avalanche. 3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. For current package drawing, please refer to the Fairchild web‐ site at https://www.fairchildsemi.com/package‐drawings/PQ/ PQFN08M.pdf |
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