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M28R400CT датащи(PDF) 12 Page - STMicroelectronics

номер детали M28R400CT
подробное описание детали  4 Mbit (256Kb x16, Boot Block) 1.8V Supply Flash Memory
PDF  48 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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M28R400CT датащи(HTML) 12 Page - STMicroelectronics

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M28R400CT, M28R400CB
12/48
ure 19., Erase Suspend & Resume Flowchart and
Pseudo Code, for flowcharts for using the Pro-
gram/Erase Resume command.
Protection Register Program Command
The Protection Register Program command is
used to Program the 64 bit user One-Time-Pro-
grammable (OTP) segment of the Protection Reg-
ister. The segment is programmed 16 bits at a
time. When shipped all bits in the segment are set
to ‘1’. The user can only program the bits to ‘0’.
Two write cycles are required to issue the Protec-
tion Register Program command.
The first bus cycle sets up the Protection
Register Program command.
The second latches the Address and the Data
to be written to the Protection Register and
starts the Program/Erase Controller.
Read operations output the Status Register con-
tent after the programming has started.
The segment can be protected by programming bit
1 of the Protection Lock Register. Bit 1 of the Pro-
tection Lock Register protects bit 2 of the Protec-
tion Lock Register. Programming bit 2 of the
Protection Lock Register will result in a permanent
protection of the Security Block (see Figure 5., Se-
curity Block Memory Map). Attempting to program
a previously protected Protection Register will re-
sult in a Status Register error. The protection of
the Protection Register and/or the Security Block
is not reversible.
The Protection Register Program cannot be sus-
pended. See APPENDIX C., Figure 21., Protec-
tion Register Program Flowchart and Pseudo
Code, for the flowchart for using the Protection
Register Program command.
Block Lock Command
The Block Lock command is used to lock a block
and prevent Program or Erase operations from
changing the data in it. All blocks are locked at
power-up or reset.
Two Bus Write cycles are required to issue the
Block Lock command.
The first bus cycle sets up the Block Lock
command.
The second Bus Write cycle latches the block
address.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table 9. shows the protection status after issuing
a Block Lock command.
The Block Lock bits are volatile, once set they re-
main set until a hardware reset or power-down/
power-up. They are cleared by a Blocks Unlock
command. Refer to the section, BLOCK LOCK-
ING, for a detailed explanation.
Block Unlock Command
The Blocks Unlock command is used to unlock a
block, allowing the block to be programmed or
erased. Two Bus Write cycles are required to is-
sue the Blocks Unlock command.
The first bus cycle sets up the Block Unlock
command.
The second Bus Write cycle latches the block
address.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table 9. shows the protection status after issuing
a Block Unlock command. Refer to the section,
BLOCK LOCKING, for a detailed explanation.
Block Lock-Down Command
A locked block cannot be Programmed or Erased,
or have its protection status changed when WP is
low, VIL. When WP is high, VIH, the Lock-Down
function is disabled and the locked blocks can be
individually unlocked by the Block Unlock com-
mand.
Two Bus Write cycles are required to issue the
Block Lock-Down command.
The first bus cycle sets up the Block Lock
command.
The second Bus Write cycle latches the block
address.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Locked-Down blocks revert to the locked (and not
locked-down) state when the device is reset on
power-down. Table 9. shows the protection status
after issuing a Block Lock-Down command. Refer
to the section, BLOCK LOCKING, for a detailed
explanation.



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