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AD9237

Data Sheet

Rev. C | Page 18 of 24

Table 7. Reference Configuration Summary

Selected Mode

SENSE Voltage

Resulting VREF (V)

Span Factor

Resulting Differential Span (V p-p)

External Reference

AVDD

N/A

Factor

Span

Reference

External

4×

Internal Fixed Reference

VREF

0.5

1.0 V

2.0 V

Programmable Reference

0.2 V to VREF

0.5 × (1 + R2/R1)

(See Figure 40)

Factor

Span

VREF

4×

Internal Fixed Reference

AGND to 0.2 V

1.0

2.0 V

4.0 V

VOLTAGE REFERENCE

A stable and accurate 0.5 V voltage reference is built into

the AD9237. The input range can be adjusted by varying

the reference voltage applied to the AD9237, using either the

internal reference or an externally applied reference voltage.

The input span of the ADC tracks reference voltage changes

linearly.

In all reference configurations, REFT and REFB drive the

A/D conversion core and, in conjunction with the span factor,

establish its input span. The input range of the ADC always

equals four times the voltage at the reference pin divided by

the span factor for either an internal or an external reference.

It is required to decouple REFT to REFB with 0.1 µF and 10 µF

decoupling capacitors, as shown in Figure 39.

Internal Reference Connection

A comparator within the AD9237 detects the potential at

the SENSE pin and configures the reference into one of four

possible states, which are summarized in Table 7. If SENSE is

grounded, the reference amplifier switch is connected to the

internal resistor divider, setting VREF to 1 V (see Figure 39).

Connecting the SENSE pin to VREF switches the reference

amplifier output to the SENSE pin, completing the loop and

providing a 0.5 V reference output. If a resistor divider is

connected, as shown in Figure 40, then the switch is again set to

the SENSE pin. This puts the reference amplifier in a non-

inverting mode with the VREF output defined as











 +

VREF

ADC

CORE

VIN–

SENSE

VREF

VIN+

REFT

REFB

0.1

µF

0.1

µF

0.1

µF

0.5V

SELECT

LOGIC

0.1

µF

AD9237

Figure 39. Internal Reference Configuration

ADC

CORE

VIN–

SENSE

VREF

VIN+

REFT

REFB

0.1

µF

0.1

µF

0.1

µF

0.5V

SELECT

LOGIC

0.1

µF

AD9237

Figure 40. Programmable Reference Configuration

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