AD9266

Data Sheet

Rev. B | Page 12 of 32

AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, 50% duty

cycle clock, DCS disabled, unless otherwise noted.

100

90

80

70

60

50

40

30

20

10

0

0

50

100

150

200

INPUT FREQUENCY (MHz)

SFDR (dBc)

SNR (dBFS)

Figure 10. AD9266-80 SNR/SFDR vs. Input Frequency (AIN) with 2 V p-p Full Scale

100

90

80

70

30

40

50

60

20

10

0

10

20

30

40

50

60

70

80

SAMPLE RATE (MSPS)

SFDR (dBc)

SNR (dBFS)

Figure 11. AD9266-80 SNR/SFDR vs. Sample Rate with AIN = 9.7 MHz

120

0

20

40

60

80

100

–65 –60

0

–10

–20

–30

–40

–50

INPUT AMPLITUDE (dBFS)

SNR

SNRFS

SFDR

SFDRFS

1.5

1.0

0.5

–0.5

0

–1.0

–1.5

0

16,384

32,768

49,152

65,536

OUTPUT CODE

0

6

4

2

–2

–4

–6

0

16,384

32,768

49,152

65,536

OUTPUT CODE

4.0M

0

500k

1.0M

1.5M

2.0M

2.5M

3.0M

3.5M

OUTPUT CODE

2.8 LSB RMS

Figure 15. Grounded Input Histogram