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AD9633 датащи(PDF) 24 Page - Analog Devices |
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AD9633 датащи(HTML) 24 Page - Analog Devices |
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24 / 42 page ![]() Data Sheet AD9633 Rev. B | Page 23 of 41 Differential Input Configurations There are several ways to drive the AD9633 either actively or passively. However, optimum performance is achieved by driving the analog inputs differentially. Using a differential double balun configuration to drive the AD9633 provides excellent perfor- mance and a flexible interface to the ADC (see Figure 57) for baseband applications. For applications where SNR is a key parameter, differential trans- former coupling is the recommended input configuration (see Figure 58), because the noise performance of most amplifiers is not adequate to achieve the true performance of the AD9633. Regardless of the configuration, the value of the shunt capacitor, C, is dependent on the input frequency and may need to be reduced or removed. It is not recommended to drive the AD9633 inputs single-ended. VOLTAGE REFERENCE A stable and accurate 1.0 V voltage reference is built into the AD9633. VREF can be configured using either the internal 1.0 V reference or an externally applied 1.0 V reference voltage. The various reference modes are summarized in the Internal Reference Connection section and the External Reference Operation section. The VREF pin should be externally decoupled to ground with a low ESR, 1.0 μF capacitor in parallel with a low ESR, 0.1 μF ceramic capacitor. Internal Reference Connection A comparator within the AD9633 detects the potential at the SENSE pin and configures the reference into two possible modes, which are summarized in Table 9. If SENSE is grounded, the reference amplifier switch is connected to the internal resistor divider (see Figure 56), setting VREF to 1.0 V. Table 9. Reference Configuration Summary Selected Mode SENSE Voltage (V) Resulting VREF (V) Resulting Differential Span (V p-p) Fixed Internal Reference AGND to 0.2 1.0 internal 2.0 Fixed External Reference AVDD 1.0 applied to external VREF pin 2.0 VREF SENSE 0.5V ADC SELECT LOGIC 0.1µF 1.0µF VIN–A/VIN–B VIN+A/VIN+B ADC CORE Figure 56. Internal Reference Configuration ADC R 0.1µF 0.1µF 2V p-p VCM C *C1 *C1 C R 0.1µF 0.1µF 0.1µF 33Ω 200Ω 33Ω 33Ω 33Ω VIN+x VIN–x ET1-1-I3 C C 5pF R *C1 IS OPTIONAL Figure 57. Differential Double Balun Input Configuration for Baseband Applications 2V p-p R R *C1 *C1 IS OPTIONAL 49.9Ω 0.1μF ADT1-1WT 1:1 Z RATIO VIN–x ADC VIN+x *C1 C VCM 33Ω 33Ω 200Ω 0.1µF 5pF Figure 58. Differential Transformer-Coupled Configuration for Baseband Applications |
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