AD9690 datasheet(66/79 Pages) AD

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Data Sheet

AD9690

Rev. B | Page 65 of 78

MEMORY MAP

READING THE MEMORY MAP REGISTER TABLE

Each row in the memory map register table has eight bit

locations. The memory map is divided into four sections: the

Analog Devices SPI registers (Register 0x000 to Register 0x00D),

the analog input buffer control registers, the ADC function

registers, the DDC function registers, and the digital outputs

and test modes registers.

Table 36 (see the Memory Map Register Table section) documents

the default hexadecimal value for each hexadecimal address shown.

The column with the heading Bit 7 (MSB) is the start of the

default hexadecimal value given. For example, Address 0x561,

the output mode register, has a hexadecimal default value of

0x01, which means that Bit 0 = 1, and the remaining bits are 0s.

This setting is the default output format value, which is twos

complement. For more information on this function and others,

see the Table 36.

Open and Reserved Locations

All address and bit locations that are not included in Table 36

are not currently supported for this device. Write unused bits of

a valid address location with 0s unless the default value is set

otherwise.

Writing to these locations is required only when part of an

address location is unassigned (for example, Address 0x561). If the

entire address location is open (for example, Address 0x13), do not

write to this address location.

Default Values

After the AD9690 is reset, critical registers are loaded with

default values. The default values for the registers are given in

the memory map register table, Table 36.

Logic Levels

An explanation of logic level terminology follows:

•

“Bit is set” is synonymous with “bit is set to Logic 1” or

“writing Logic 1 for the bit.”

•

“Clear a bit” is synonymous with “bit is set to Logic 0” or

“writing Logic 0 for the bit.”

•

X denotes a don’t care bit.

SPI Soft Reset

After issuing a soft reset by programming 0x81 to Register 0x000,

the AD9690 requires 5 ms to recover. When programming the

AD9690 for application setup, ensure that an adequate delay is

programmed into the firmware after asserting the soft reset and

before starting the device setup.

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