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LTC3901 датащи(PDF) 5 Page - Linear Technology |
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LTC3901 датащи(HTML) 5 Page - Linear Technology |
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5 / 16 page ![]() LTC3901 5 3901f TYPICAL PERFOR A CE CHARACTERISTICS VCC Supply Current vs Load Capacitance CLOAD (nF) 1 02 3 10 45 6 7 9 8 TA = 25°C 3901 G16 VCC = 5V VCC = 11V 30 25 20 15 10 5 0 PVCC (Pin 1): Driver Supply Input. This pin powers the ME and MF drivers. Bypass this pin to PGND using a 4.7µF low ESR capacitor in close proximity to the LTC3901. This pin should be connected to the same supply voltage as the VCC pin. ME (Pin 2, 3): Driver Output for ME. This pin drives the gate of the external N-channel MOSFET, ME. PGND (Pin 4,13): Power Ground. Both drivers return to this pin. Connect PGND to a high current ground node in close proximity to the sources of ME and MF. CSE+, CSE– (Pin 6, 5): ME Current Sense Differential Input. Connect CSE+ through a series resistor to the drain of ME and CSE– through a series resistor to the source of ME. The LTC3901 monitors the CSE inputs 250ns after ME goes high. If the inductor current reverses and flows into ME causing CSE+ to rise above CSE–by more than 10.5mV, the LTC3901 pulls ME low. See the Current Sense section for more details on choosing the resistance values for RCSE1 to RCSE3. TIMER (Pin 7): Timer Input. Connect this pin to an external R-C network to program the timeout period. The LTC3901 resets the timer at every positive and negative transition of the SYNC input. If the SYNC signal is missing or incorrect, the LTC3901 pulls both ME and MF low once the TIMER pin goes above the timeout threshold. See the Timer sec- tion for more details on programming the timeout period. GND (Pin 8,10): Signal Ground. All internal low power circuitry returns to this pin. To minimize differential ground currents, connect GND to PGND right at the LTC3901. SYNC (Pin 9): Driver Synchronization Input. 0V at this pin forces both ME and MF high after an initial negative pulse. A subsequent positive pulse at SYNC input forces ME to pull low, whereas a negative pulse forces MF to pull low. The SYNC signal should alternate between positive and negative pulses. If the SYNC signal is incorrect, the LTC3901 pulls both MF and ME low. CSF+, CSF– (Pin 11, 12): MF Current Sense Differential Input. Connect CSF+ through a series resistor to the drain of MF and CSF– through a series resistor to the source of MF. The LTC3901 monitors the CSF inputs 250ns after MF goes high. If the inductor current reverses and flows into MF causing CSF+ to rise above CSF– by more than 10.5mV, the LTC3901 pulls MF low. See the Current Sense section for more details on choosing the resistance values for RCSF1 to RCSF3. MF (Pin 14, 15): Driver Output for MF. This pin drives the gate of the external N-channel MOSFET, MF. VCC (Pin 16): Power Supply Input. All internal circuits except the drivers are powered from this pin. Bypass this pin to GND using a 1µF capacitor in close proximity to the LTC3901. PI FU CTIO S VCC Supply Current vs Temperature 3901 G15 TEMPERATURE (°C) –50 100 050 –25 25 75 125 CLOAD = 4.7nF 20 18 16 14 12 10 8 6 4 VCC = 5V VCC = 11V |
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