DRP3510 datasheet(13/30 Pages) ETC

номер детали	DRP3510

подробное описание детали	Digital Receiver Front-end

PDF	30 Pages

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производитель	ETC [List of Unclassifed Manufacturers]

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ADVANCE INFORMATION

DRX 3960A

Micronas

4.1.3. Protocol Description

Write protocol

Read protocol

Write to Control or Test Registers

Write to Port Registers

Note: S =

I2C bus Start Condition from master

P =

I2C bus Stop Condition from master

ACK =

Acknowledge-Bit: LOW on I2C_DA from slave (= DRX, light gray)

or master (= controller dark gray)

NAK =

Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’

or from DRX indicating internal error state

Wait =

I2C clock line is held low, while the DRX is processing the I2C command. This waiting time is

max. 1 ms

Fig. 4–1: I2C bus protocol (MSB first; data must be stable while clock is high)

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK data-byte-

high

ACK data-byte

low

ACK

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK

read

device

address

Wait

ACK data-byte-

high

ACK data-byte

low

NAK

Swrite

device

address

Wait

ACK sub-addr ACK data-byte

high

ACK data-byte

low

ACK

Swrite

device

address

Wait

ACK sub-addr ACK data-byte ACK

I2C_DA

I2C_CL

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