RT5509WSC datasheet(7/58 Pages) RICHTEK

7 / 58 page

RT5509

is a registered trademark of Richtek Technology Corporation

DS5509-00

August

2017

www.richtek.com

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Clock Data Fall Time

300

Clock Data Rise Time

300

Spike Suppression Time

tSP

2S Interface Electrical Characteristics

(Note 5)

High-Level Input Voltage

VIH

0.7x

DVDD

Low-Level Input Voltage

VIL

0.3x

DVDD

Setup Time, LRCK to SCLK

Rising Edge

tsu1

Hold Time, LRCK from SCLK

Rising Edge

th1

Setup Time, SDIN to SCLK

Rising Edge

tsu2

Hold Time, SDIN from SCLK

Rising Edge

th2

Rise/Fall Time for

SCLK/LRCLK

Note 1. Continuously s

tresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those

indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions may affect device reliability.

Note 2.

JA is measured under natural convection (still air) at TA = 25C with the component mounted on a high

effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.

Note 3. Devices are ESD sensitive. Handling precaution recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by design.

Note 6. The switching terminal should be used within AC peak limits. Overshoot and undershoot must be less than 100ns.

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