RT5509WSC datasheet(49/58 Pages) RICHTEK

49 / 58 page

RT5509

is a registered trademark of Richtek Technology Corporation

DS5509-00

August

2017

www.richtek.com

ADDR Byte

Bits

R/W

Name

Description

Default

0xD1

127:122

Reserved

121:96

R/W

DRC_AE

DRC_AE[25:0]

26'h0800000

95:90

Reserved

89:64

R/W

DRC_1_AE

DRC_1_AE[25:0]

26'h0000000

63:58

Reserved

57:32

R/W

DRC_AA

DRC_AA[25:0]

26'h0800000

31:26

Reserved

25:0

R/W

DRC_AD

DRC_AD[25:0]

26'h0800000

0xD2

R/W

DRC_RMS

0 : RMS

1 : Peak

54:52

R/W

DRC_KNEE[2:0]

3'b000

51:50

Reserved

49:40

R/W

DRC_TH0[9:0]

1. 0 to

127dB, 0.125dB per step

2. 10'h000 is 0dB

3. value definiton is 7.3

10'h000

39:34

Reserved

33:24

R/W

DRC_TH1[9:0]

1. 0 to

127dB, 0.125dB per step

2. 10'h000 is 0dB

10'h000

23:16

R/W

DRC_OFF[7:0]

1. +24dB to

24dB

2. 0.25dB per step

3. value definiton is 6.2, MSB is sign

bit.

8'h00

15:13

Reserved

12:8

R/W

DRC_R0[4:0]

1. 0 to 1

2. 5'h10 is 1

5'h10

Reserved

6:0

R/W

DRC_R1[6:0]

1. 1 to 8

2. 7'h10 is 1

7'h10

0xD3

159:128

R/W

bq_1_b0

u[31:26], b0[25:0]

32'h00800000

127:96

R/W

bq_1_b1

u[31:26], b1[25:0]

32'h00000000

95:64

R/W

bq_1_b2

u[31:26], b2[25:0]

32'h00000000

63:32

R/W

bq_1_a1

u[31:26], a1[25:0]

32'h00000000

31:0

R/W

bq_1_a2

u[31:26], a2[25:0]

32'h00000000

0xD4

159:128

R/W

bq_2_b0

u[31:26], b0[25:0]

32'h00800000

127:96

R/W

bq_2_b1

u[31:26], b1[25:0]

32'h00000000

95:64

R/W

bq_2_b2

u[31:26], b2[25:0]

32'h00000000

63:32

R/W

bq_2_a1

u[31:26], a1[25:0]

32'h00000000

31:0

R/W

bq_2_a2

u[31:26], a2[25:0]

32'h00000000

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