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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM505LRBABFR датащи(PDF) 47 Page - Texas Instruments |
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DM505LRBABFR датащи(HTML) 47 Page - Texas Instruments |
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47 / 290 page  47 DM505 www.ti.com SPRS976D – NOVEMBER 2016 – REVISED JULY 2017 Submit Documentation Feedback Terminal Configuration and Functions Copyright © 2016–2017, Texas Instruments Incorporated Table 4-9. EMIF Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL ddr1_casn EMIF1 Column Address Strobe; When LPDDR2 is used this signal functions as ddr1_ca1 O F2 ddr1_ba0 EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca7 O B3 ddr1_ba1 EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca8 O A3 ddr1_ba2 EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca9 O D2 ddr1_a0 EMIF1 Address Bus O U4 ddr1_a1 EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca5 O C1 ddr1_a2 EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca6 O D3 ddr1_a3 EMIF1 Address Bus O R4 ddr1_a4 EMIF1 Address Bus O T4 ddr1_a5 EMIF1 Address Bus O N3 ddr1_a6 EMIF1 Address Bus O T2 ddr1_a7 EMIF1 Address Bus O N2 ddr1_a8 EMIF1 Address Bus O T1 ddr1_a9 EMIF1 Address Bus O U1 ddr1_a10 EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca4 O D1 ddr1_a11 EMIF1 Address Bus O R3 ddr1_a12 EMIF1 Address Bus O U2 ddr1_a13 EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca3 O C3 ddr1_a14 EMIF1 Address Bus O R2 ddr1_a15 EMIF1 Address Bus O V1 ddr1_d0 EMIF1 Data Bus IO AA6 ddr1_d1 EMIF1 Data Bus IO AA8 ddr1_d2 EMIF1 Data Bus IO Y8 ddr1_d3 EMIF1 Data Bus IO AA7 ddr1_d4 EMIF1 Data Bus IO AB4 ddr1_d5 EMIF1 Data Bus IO Y5 ddr1_d6 EMIF1 Data Bus IO AA4 ddr1_d7 EMIF1 Data Bus IO Y6 ddr1_d8 EMIF1 Data Bus IO AA18 ddr1_d9 EMIF1 Data Bus IO Y21 ddr1_d10 EMIF1 Data Bus IO AA21 ddr1_d11 EMIF1 Data Bus IO Y22 ddr1_d12 EMIF1 Data Bus IO AA19 ddr1_d13 EMIF1 Data Bus IO AB20 ddr1_d14 EMIF1 Data Bus IO Y17 ddr1_d15 EMIF1 Data Bus IO AB18 ddr1_d16 EMIF1 Data Bus IO AA3 ddr1_d17 EMIF1 Data Bus IO AA2 ddr1_d18 EMIF1 Data Bus IO Y3 ddr1_d19 EMIF1 Data Bus IO V2 ddr1_d20 EMIF1 Data Bus IO U3 ddr1_d21 EMIF1 Data Bus IO V3 ddr1_d22 EMIF1 Data Bus IO Y2 ddr1_d23 EMIF1 Data Bus IO Y1 ddr1_d24 EMIF1 Data Bus IO U21 ddr1_d25 EMIF1 Data Bus IO T20 ddr1_d26 EMIF1 Data Bus IO R21 |
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