RT9428WSC datasheet(10/14 Pages) RICHTEK

10 / 14 page

RT9428

DS9428-01

October 2014

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Table 3. MFA Register Commands

Value

Command

Description

5400h

Initialization

Reset the IC

[Sleep]

Writing [Sleep] to logic 1 forces the IC to enter Sleep

mode. Writing [Sleep] to logic 0 forces the IC to exit Sleep

mode. The power on reset value for [Sleep] is logic 0.

[SCEN]

Writing [SCEN] to logic 1 to enable SOC Change Alert.

When SOC Change Alert is enabled, the [SC] flag is set

to 1 if SOC is changed at least 1%. The power on reset

value for [SCEN] is logic 0.

[Alert]

The [Alert] bit is set by the IC when the alert condition

occurs. The [Alert] bit is cleared by either host writing 0

to clear or a reset condition occurs.

The power on reset value for [Alert] is logic 0.

Figure 3. Config Register

Bit

Description

0x0C

7 : 0

VGCOMP

0x0D

Sleep

SCEN

Alert

4 : 0

SOCLow

Device ID

The Device ID register is a read only register that contains

a value indicating the production ID of the RT9428.

dSOC

The dSOC register is a read only registert that reports

the approximately incremetal SOC in unit of 1% per hour.

Config

The Config register includes the parameter of

compensation, setting of sleep mode and SOCLow

threshold. It also indicates the alert status. The format of

Config is shown in Figure 3.

VGCOMP is the setting to optimize IC performance for

different cell chemistries or temperatures. Contact Richtek

for instructions for optimization. The power on reset value

for VGCOMP is 32h.

[SOCLow]

The SOCLow is a 5-bit value for setting the low battery

alert threshold and defined as 2's-complement form. The

programming unit is 1% and range is 32% to 1%. (00000

= 32%, 10001 = 15%, 11100 = 4%, 11111 = 1%). The

power on reset value for SOCLow is 4% or 1Ch.

MFA

The MFA register allows the host processor to send

special commands to the chip for manufacturing. Valid

MFA register write values are listed as follows. All other

MFA register values are reserved. Table 3 shows MFA

Status

The Status register reports the alert status of RT9428.

When any alert flag of Status register is set, the [Alert]

flag of Config register will be set.

[SC]

The [SC] flag is set when SOC changes at least 1%. The

[SC] flag is cleared by either host writing 0 to clear or a

reset condition occurs. The power on reset value of [SC]

is logic 0.

[SL]

The [SL] flag is set when SOC is lower than SOC threshold

set by [SOCLow] bits. The [SL] flag is cleared by either

host writing 0 to clear or a reset condition occurs. The

power on reset value of [SL] is logic 0.

[RI]

The [RI] flag is set at POR and could be cleared after

configuration. The power on reset value of [RI] is logic 1.

OCV

The OCV register reports Open Circuit Voltage

corresponding to present SOC in unit of 1.25mV.

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