HT56RB688_13 datasheet(65/164 Pages) HOLTEK

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Controlling the on/off function of the A/D converter circuitry is implemented using the ADONB bit in

the ACSR register. When the ADONB bit is cleared to 0, the A/D converter is enabled.

Although the A/D clock source is determined by the system clock fSYS, and by bits ADCS2~ADCS0,

there are some limitations on the maximum A/D clock source speed that can be selected. As the minimum

value of permissible A/D clock period, tAD,is0.5ms, care must be taken for system clock frequencies equal

to or greater than 4MHz. For example, if the system clock operates at a frequency of 4MHz, the

ADCS2~ADCS0 bits should not be set to ²100². Doing so will give A/D clock periods that are less than the

minimum A/D clock period which may result in inaccurate A/D conversion values. Refer to the following

table for examples, where values marked with an asterisk * show where, depending upon the device,

special care must be taken, as the values may be less than the specified minimum A/D Clock Period.

fSYS

A/D Clock Period (tAD)

ADCS=000

(tAD=2/fSYS)

ADCS=001

(tAD=8/fSYS)

ADCS=010

(tAD=32/fSYS)

ADCS=011

(undefined)

ADCS=100

(tAD=1/fSYS)

ADCS=101

(tAD=4/fSYS)

ADCS=110

(tAD=16/fSYS)

ADCS=111

(undefined)

1MHz

ms8ms32ms

Undefined

ms4ms16ms

Undefined

2MHz

ms4ms16ms

Undefined

500ns

ms8ms

Undefined

4MHz

500ns

ms8ms

Undefined

250ns*

ms4ms

Undefined

8MHz

250ns*

4ms

Undefined

125ns*

500ns

Undefined

12MHz

167ns*

667ns

2.67

Undefined

83ns*

333ns*

1.33

Undefined

A/D Clock Period Examples

A/D Input Pins

All of the A/D analog input pins are pin-shared with the I/O pins on Port A. Bits PCR7~PCR0 in the

ADPCR register, determine whether the input pins are setup as normal input/output pins or whether

they are setup as analog inputs. In this way, pins can be changed under program control to change their

function from normal I/O operation to analog inputs and vice versa. Pull-high resistors, which are

setup through register programming, apply to the input pins only when they are used as normal I/O

pins, if setup as A/D inputs the pull-high resistors will be automatically disconnected. Note that it is not

necessary to first setup the A/D pin as an input in the port control register to enable the A/D input as

when the PCR7~PCR0 bits enable an A/D input, the status of the port control register will be

overridden. The A/D converter has its own power supply pins AVDD and AVSS and a VREF reference

pin. The analog input values must not be allowed to exceed the value of VREF.

Initialising the A/D Converter

The internal A/D converter must be initialised in a special way. Each time the A/D channel selection

bits are modified by the program, the A/D converter must be re-initialised. If the A/D converter is not

initialised after the channel selection bits are changed, the EOCB flag may have an undefined value,

which may produce a false end of conversion signal. To initialise the A/D converter after the channel

selection bits have changed, then the START bit in the ADCR register must first be set high and then

immediately cleared to zero. This will ensure that the EOCB flag is correctly set to a high condition.

Summary of A/D Conversion Steps

The following summarises the individual steps that should be executed in order to implement an A/D

conversion process.

· Step 1

Select the required A/D conversion clock by correctly programming bits ADCS2, ADCS1 and

ADCS0 in the register.

· Step 2

Enable the A/D by clearing the in the ACSR register to zero.

HT56RB688

TinyPowerTM A/D type Smart Card OTP MCU

with LCD, DAC, ISO 7816 and USB Interfaces

Rev. 1.10

April 15, 2013

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