HT69F240 datasheet(2/172 Pages) HOLTEK

2 / 172 page

Rev. 1.20

�a�� 2�� 201�

Rev. 1.20

�a�� 2�� 201�

HT69F240

I/O 8-Bit Flash MCU with LED/LCD Driver

HT69F240

I/O 8-Bit Flash MCU with LED/LCD Driver

Table of Contents

Features............................................................................................................ 6

CPU Featu�es ......................................................................................................................... 6

Pe�ip�e�al Featu�es................................................................................................................. 6

General Description......................................................................................... 7

Block Diagram.................................................................................................. 7

Pin Assignment................................................................................................ 8

Pin Description ................................................................................................ 9

Absolute Maximum Ratings.......................................................................... 12

D.C. Characteristics....................................................................................... 12

A.C. Characteristics....................................................................................... 14

LVD & LVR Electrical Characteristics .......................................................... 15

System Architecture...................................................................................... 16

Clo�king and Pipelining......................................................................................................... 16

P�og�am Counte�................................................................................................................... 17

Sta�k ..................................................................................................................................... 17

A�it�meti� and Logi� Unit – ALU ........................................................................................... 18

Flash Program Memory................................................................................. 18

St�u�tu�e................................................................................................................................ 18

Spe�ial Ve�to�s ..................................................................................................................... 19

Look-up Table........................................................................................................................ 19

Table P�og�am Example........................................................................................................ 19

In Ci��uit P�og�amming – ICP ............................................................................................... 20

On-C�ip Debug Suppo�t – OCDS ......................................................................................... 21

Data Memory .................................................................................................. 21

St�u�tu�e................................................................................................................................ 22

Gene�al Pu�pose Data �emo�y ............................................................................................ 22

Spe�ial Pu�pose Data �emo�y ............................................................................................. 22

Special Function Register Description........................................................ 24

Indi�e�t Add�essing Registe�s – IAR0� IAR1 ......................................................................... 24

�emo�y Pointe�s – �P0� �P1 .............................................................................................. 24

Bank Pointe� – BP................................................................................................................. 2�

A��umulato� – ACC............................................................................................................... 2�

P�og�am Counte� Low Registe� – PCL.................................................................................. 2�

Look-up Table Registe�s – TBLP� TBHP� TBLH..................................................................... 2�

Status Registe� – STATUS.................................................................................................... 26

EEPROM Data Memory.................................................................................. 28

EEPRO� Registe�s .............................................................................................................. 28

Reading Data f�om t�e EEPRO� ......................................................................................... 29

W�iting Data to t�e EEPRO�................................................................................................ 30

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