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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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EPC660 датащи(PDF) 11 Page - Espros Photonics corp |
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EPC660 датащи(HTML) 11 Page - Espros Photonics corp |
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11 / 16 page  2.2. Pin list Pin No. Pin name Supply class VSC Pin type Rst func Rst level Description IO pins 2 DATA0 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-0 (LSB) / Strap 0: reserved 3 DATA1 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-1 / Strap 1: reserved 6 DATA2 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-2 / Strap 2: reserved 7 DATA3 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-3 / Strap 3: reserved 10 DATA4 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-4 / Strap 4: reserved 11 DATA5 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-5 / Strap 5: reserved 14 DATA6 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-6 / Strap 6: reserved 15 DATA7 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-7 / Strap 7: reserved 16 DATA8 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-8 / Strap 8: reserved 17 DATA9 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-9 / Strap 9: reserved 20 DATA10 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-10 / Strap 10: reserved 21 DATA11 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-11 (MSB) / Strap 11: reserved 65 DCLK VDDIO DIO IPD 1 VOL TCMI Data Clock output / Strap 12: reserved 63 VSYNC_A0 VDDIO DIO IPD 1 VOH TCMI Vsync output / Strap 13: I2C device address bit A0 64 HSYNC_A1 VDDIO DIO IPD 1 VOH TCMI Hsync output / Strap 14: I2C device address bit A1 1 XSYNC_SAT_CFG VDDIO DIO IPD 1 VOH TCMI Xsync output / TCMI Saturation flag output / Strap 15: reserved 26 SCL VDDIO DIOD I VIH I2C clock input 5 27 SDA VDDIO DIOD I VIH I2C data input/output 5 56 SHUTTER VDDIO DI PD VIL Shutter release input 55 RESET VDDIO DI PD VIL Reset input (active low), 600kΩ int. pull-down 4 68 MODCLK VDDIO DI PD Modulator/demodulator external clock input. If not used, connection to a test pad suggested. 54 LED2 VDDIO DO LED driver push-pull output 3 22 TDO VDDIO DO VOL JTAG test data output. Do not any electrical con- nection except to a test pad (suggested). 23 TDI VDDIO DI PU VIH JTAG test data input. Do not any electrical con- nection except to a test pad (suggested). 24 TCK VDDIO DI PD VIL JTAG test clock input. Do not any electrical con- nection except to a test pad (suggested). 25 TMS VDDIO DI PU VIH JTAG test mode select input. Do not any electri- cal connection except to a test pad (suggested). Digital pins 59 XTALIN_CLKIN VDDPLL AI OSC input from external XTAL or Resonator / CLKIN from external clock source 60 XTALOUT VDDPLL AO OSC output (buffered) to ext. XTAL or Resonator Table 8: Pin list © 2017 ESPROS Photonics Corporation Characteristics subject to change without notice 11 / 116 Datasheet_epc660-V1.09 www.espros.com |
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