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MPC823 датащи(PDF) 25 Page - Freescale Semiconductor, Inc |
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MPC823 датащи(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 70 page ![]() MPC823 ELECTRICAL SPECIFICATIONS 25 Table 2. Interrupt Timing NUM CHARACTERISTIC 25MHZ 40MHZ 50MHZ UNIT MIN MAX MIN MAX MIN MAX I39 IRQx valid to CLKOUT rising edge (setup time) 6 Ñ 6/6 Ñ 6/6 Ñ ns I40 IRQx hold time after CLKOUT 2 Ñ 2/2 Ñ 2/2 Ñ ns I41 IRQx pulse width low 3 Ñ 3/3 Ñ 3/3 Ñ ns I42 IRQx pulse width high 3 Ñ 3/3 Ñ 3/3 Ñ ns I43 IRQx edge to edge time 160 Ñ 80/80 Ñ 80/80 Ñ ns NOTES: 1. The timings I39 and I40 describe the testing conditions under which the IRQ lines are tested when defined as level sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference to the CLKOUT. 2. The timings I41 and I42 are speciÞed to allow the correct function of the IRQ lines detection circuitry, and has no direct relation with the total system interrupt latency that the MPC823 can support. Figure 20. Interrupt Detection Timing Diagram for External Level-Sensitive Lines CLKOUT IRQx I39 I40 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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