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PCF5079 датащи(PDF) 25 Page - NXP Semiconductors |
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PCF5079 датащи(HTML) 25 Page - NXP Semiconductors |
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25 / 28 page ![]() 2001 Nov 21 25 Philips Semiconductors Product specification Dual-band power amplifier controller for GSM, PCN and DCS PCF5079 15 SOLDERING (HVSON10) 15.1 Soldering information Information contained within this chapter is of a preliminary nature and may change without notice. 15.2 PCB design guidelines These guidelines are to help the user in developing the proper PCB design. For the surface mount process refer to “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). 15.2.1 PERIMETER PAD DESIGN Referring to Fig.20, dimensions Z and G are respectively the outside to outside and the inside to inside pad dimensions. The dimensions X and Y indicate respectively the width and the length of the pad. Note that the calculated X dimension is the maximum value in order to avoid solder bridging between adjacent pads.The calculated Y dimension is the minimum value and therefore pad design should start with this value and the pad length at the outside be extended if more solder joint fillets are required. The dimension ‘Cpl’ defines the minimum distance between the inner tip of the pad and the outer edge of the thermal pad. It is suggested that this dimension be fixed at 0.15 mm to avoid solder bridging issues between the thermal pad and the perimeter pads. handbook, full pagewidth MGW498 Cpl = 0.15 0.33 0.30 thermal via Z = 3.46 3.27 Y = 0.69 0.55 G = 2.09 1.20 1.00 X = 0.28 0.50 TYP 2.00 REF 1.20 1.00 Fig.20 HVSON10 PCB pattern. Dimensions in mm. The solder mask opening dimension should be larger than the pad dimension by 125 to 150 µm. 15.2.2 THERMAL PAD AND VIA DESIGN The size of the thermal pad should at least match the size of the exposed die-attach paddle. However, in some cases, the die-attach paddle size may need to be modified to avoid solder bridging between the thermal pad and the perimeter pads. In order to effectively transfer heat from the top metal layer to the inner or bottom layers of the PCB, thermal vias should be incorporated into the thermal pad design. The number of thermal vias will depend on the application and on the power dissipation and electrical requirements. It is recommended to incorporate an array of thermal vias at a pitch of 1.0 to 1.2 mm with the via diameter between 0.3 and 0.33 mm. |
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