LT4220IGN datasheet(11/16 Pages) LINER

11 / 16 page

LT4220

4220f

Initial Power-Up Sequence

After the power pins first make contact, transistors Q1 and

Q2 remain off. If the voltage at the ON+ and ON– pins

exceed the turn-on threshold voltage, the internal voltage

on the VCC and VEE power pins exceed the undervoltage

lockout threshold, and the timer pin voltage is less than

1.24V, the gate drive to transistors Q1 and Q2 will be

turned on. The voltage on the GATE+ and GATE– pins will

be regulated to control the inrush current if the voltage

across RS+ or RS– exceeds the sense amplifier current

limit threshold. If supply tracking is enabled, each gate will

also be regulated to keep the magnitudes at the FB+ and

FB– pins within 50mV of each other.

VCC

ON+

µF

VEE

VCC

FAULT

TIMER

GND

ON–

PWRGD

FB+

R10

VOUT+

R12

R11

4220 F07

VOUT–

Ω

FB–

SENSE+

–

GATE+

Ω

10nF

100nF

VEE

SENSE–

SENSEK

LT4220

GATE–

CL2

CL1

Z2*

R14

Ω

100nF

Z1*

R13

Ω

CONNECT FOR

AUTO RESTART

BACKPLANE

CONNECTOR

STAGGERED

PCB EDGE

CONNECTOR

VIN

–

GND MUST CONNECT FIRST

GND

*TRANSIENT VOLTAGE SUPPRESSOR

ESD

CONTROL

TRACK

R16, 20k

IN4001

Figure 7. Hot Swap Controller on Daughter Board with Tracking Disabled

APPLICATIO S I FOR ATIO

live insertion. Resistive dividers R1, R2 and R3, R4 pro-

vide undervoltage sensing. Resistor dividers R9, R10 and

R11, R12 provide a power good signal and control output

voltage tracking when TRACK is enabled.

Internal Supply Diodes

The LT4220 contains two internal diodes which clamp VEE

and VCC with respect to GND in the event either supply pin

is floating. VEE is clamped one diode above GND and VCC

is clamped one diode below GND. The current through

these diodes are designed to handle 10mA internal device

current and should not be used for high load current

conditions.

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