поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

AS3935 датащи(PDF) 17 Page - ams AG

номер детали AS3935
подробное описание детали  Embedded man-made disturber rejection algorithm
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AMSCO [ams AG]
домашняя страница  http://www.ams.com
Logo AMSCO - ams AG

AS3935 датащи(HTML) 17 Page - ams AG

Back Button AS3935 Datasheet HTML 13Page - ams AG AS3935 Datasheet HTML 14Page - ams AG AS3935 Datasheet HTML 15Page - ams AG AS3935 Datasheet HTML 16Page - ams AG AS3935 Datasheet HTML 17Page - ams AG AS3935 Datasheet HTML 18Page - ams AG AS3935 Datasheet HTML 19Page - ams AG AS3935 Datasheet HTML 20Page - ams AG AS3935 Datasheet HTML 21Page - ams AG Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 28 page
background image
www.austriamicrosystems.com
Revision 1.2
16 - 27
AS3935
Datasheet - Detailed Descri p ti on
8.4.4 Send Direct Command Byte
It is possible to send direct commands by writing 0x96 in the registers REG0x3C and REG0x3D, as shown in the table below:
8.5 I²C
An I²C slave interface is implemented for read/write access to the internal registers and to send direct commands. To enable the I²C as interface,
the Select Interface pin has to be set to the positive voltage supply (SI=VDD). The I2CL is the clock bus, while the I2CD is the data bus. An
external pull-up resistor on the I2CL pin is needed.
The device addresses for the AS3935 in read or write mode are defined by:
0-0-0-0-0-a1-a0-0: write mode device address (DW)
0-0-0-0-0-a1-a0-1: read mode device address (DR)
Where a0 and a1 are defined by the pins 5 (ADD0) and 6 (ADD1).
Figure 16. I²C Timing Diagram
Table 13. Registers 0x3C, 0x3D
Direct Command
Register
Description
PRESET_DEFAULT
0x3C
Sets all registers in default mode
CALIB_RCO
0x3D
Calibrates automatically the internal RC Oscillators
Table 14. I²C Parameters
Symbol
Parameter
Conditions
Min
Typ
Max
Units
TSP
Spike intensity
50
100
ns
THI
High Clock Time
400 kHz Clock speed
330
ns
TLO
Low Clock Time
660
ns
TSU
I2CD has to change Tsetup before rising
edge I2CL
30
ns
THD
No hold time needed for I2CD relative to
rising edge of I2CL
-40
ns
THD;STA
Within start condition, after low going I2CD, I2CL has to stay constant for
specified hold time
300
ns
TSU;STO
After high going edge of I2CL, I2CD has to stay constant for the specified setup
time before STOP or repeated start condition is applied
100
ns
TSU;STA
100
ns
I2CD
I2CL
start
THD;STA
T
LO
THI
TF
T
SU;DAT
sr
TSU;STA
TSP
TSU;STO
stop
TR



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com