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AS4C64M8D2 датащи(PDF) 52 Page - Alliance Semiconductor Corporation

номер детали AS4C64M8D2
подробное описание детали  Fully synchronous operation
PDF  59 Pages
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производитель  ALSC [Alliance Semiconductor Corporation]
домашняя страница  https://www.alliancememory.com
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AS4C64M8D2 датащи(HTML) 52 Page - Alliance Semiconductor Corporation

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AS4C64M8D2
Confidential
52
Rev. 1.0
Feb. /2014
Figure 44. Self refresh operation
CK#
CK
CKE
T0
T1
T5
Tm
T2
T3
CMD
>=tXSNR
tRP*
tCH
tCL
tCK
T4
T6
Tn
>=tXSRD
tIS
VIL(ac)
VIH(ac)
tIS
NOP
Self
Refresh
ODT
tAOFD
tIS
VIL(ac)
tIH
tIS
tIH
tIS tIH
VIL(dc)
VIL(ac)
VIH(ac)
VIH(dc)
NOP
NOP
Valid
NOTE 1 Device must be in the "All banks idle" state prior to entering Self Refresh mode.
NOTE 2 ODT must be turned off tAOFD before entering Self Refresh mode, and can be
turned on again when tXSRD timing is satisfied.
NOTE 3 tXSRD is applied for Read or a Read with autoprecharge command.
tXSNR is applied for any command except a Read or a Read with autoprecharge command.
Figure 45. Basic power down entry and exit timing diagram
CK#
CK
Command
CKE
VALID
tIH
tCKE min
tIH
tIH
tIH
tIS
tIS
tIS
NOP
NOP
NOP
VALID
VALID
or NOP
tXP, tXARD
tXARDS
tCKE(min)
Exit Power-Down mode
Don't Care
Enter Power-Down mode
Figure 46. CKE intensive environment
CK#
CKE
tCKE
NOTE: DRAM guarantees all AC and DC timing & voltage specifications and proper DLL operation with intensive CKE operation
CK
tCKE
tCKE
tCKE



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