TLF7511

July 1986

DS8907 AMFM Digital

Phase-Locked Loop Frequency Synthesizer

General Description

The DS8907 is a PLL synthesizer designed specifically for

use in AMFM radios It contains the reference oscillator a

dual modulus programmable divider and an 18-bit shift reg-

isterlatch for serial data entry The device is designed to

operate with a serial data controller generating the neces-

sary division codes for each frequency and logic state infor-

mation for radio function inputsoutputs

The Colpitts reference oscillator for the PLL operates at

4 MHz A chain of dividers is used to generate a 500 kHz

clock signal for the external controller Additional dividers

generate a 25 kHz reference signal for FM and a 10 kHz

reference signal for AM One of these reference signals is

selected by the data from the controller for use by the

phase comparator

Data is transferred between the frequency synthesizer and

the controller via a 3 wire bus system This consists of a

data input line an enable line and a clock line When the

enable line is low data can be shifted from the controller

into the frequency synthesizer When the enable line is tran-

sitioned from low to high data entry is disabled and data

present in the shift register is latched

From the controller 20-bit data stream the first 2 bits ad-

dress the device permitting other devices to share the same

bus Of the remaining 18-bit data word the next 13 bits are

used for the PLL divide code The remaining 5 bits are con-

nected via latches to output pins These 5 bits can be used

to drive radio functions such as gain mute FM AM and

stereo only These outputs are open collector Bit 16 is used

internally to select the AM or FM local oscillator input and to

select between the 10 kHz and 25 kHz reference A high

level at bit 16 indicates FM and a low level indicates AM

scaler and a high speed charge pump The programma-

into the shift register (bits 1 – 13 after address) It is clocked

prescaler or through a

d

prescaler from the FM input The AM input will work

at frequencies up to 15 MHz while the FM input works up to

120 MHz The AM band is tuned with a frequency resolution

of 10 kHz and the FM band is tuned with a resolution of

25 kHz The buffered AM and FM inputs are self biased and

can be driven directly by the VCO through a capacitor The

ECL phase comparator produces very accurate resolution

of the phase difference between the input signal and the

reference oscillator The high speed charge pump consists

quency is low the charge pump will source current and sink

current if the VCO frequency is high When using an AFC

the charge pump output may be forced into TRI-STATE

by

applying a low level to the charge pump enable input

oscillator and reference chain to provide controller clocking

frequencies when the balance of the PLL is powered down

Features

Y

Uses inexpensive 4 MHz reference crystal

Y

thesis at FM frequencies

Y

FM resolution of 25 kHz allows usage of 107 MHz ce-

ramic filter distribution

Y

Serial data entry for simplified control

Y

50 Hz output for ‘‘time-of-day’’ reference driven from

Y

5-open collector buffered outputs for controlling various

radio functions

Y

Separate AM and FM inputs AM input has 15 mV (typi-

cal) hysteresis

Dual-In-Line Package

Connection Diagram

Order Number DS8907N

See NS Package Number

N20A

TLF7511 – 1

Top View

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

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