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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L471RG датащи(PDF) 190 Page - STMicroelectronics |
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STM32L471RG датащи(HTML) 190 Page - STMicroelectronics |
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190 / 218 page  Electrical characteristics STM32L471xx 190/218 DocID027226 Rev 1 Synchronous waveforms and timings Figure 40 through Figure 43 represent synchronous waveforms and Table 96 through Table 99 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • BurstAccessMode = FMC_BurstAccessMode_Enable • MemoryType = FMC_MemoryType_CRAM • WriteBurst = FMC_WriteBurst_Enable • CLKDivision = 1 • DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM Table 94. Asynchronous multiplexed PSRAM/NOR write timings(1)(2) 1. CL = 30 pF. 2. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 4THCLK-0.5 4THCLK+2 ns tv(NWE_NE) FMC_NEx low to FMC_NWE low THCLK-0.5 THCLK+1 tw(NWE) FMC_NWE low time 2xTHCLK-1.5 2xTHCLK+1. 5 th(NE_NWE) FMC_NWE high to FMC_NE high hold time THCLK-0.5 - tv(A_NE) FMC_NEx low to FMC_A valid - 3 tv(NADV_NE) FMC_NEx low to FMC_NADV low 0 1 tw(NADV) FMC_NADV low time THCLK-0.5 THCLK+1 th(AD_NADV) FMC_AD(adress) valid hold time after FMC_NADV high THCLK-2 - th(A_NWE) Address hold time after FMC_NWE high THCLK-1 - th(BL_NWE) FMC_BL hold time after FMC_NWE high THCLK+0.5 - tv(BL_NE) FMC_NEx low to FMC_BL valid - 1.5 tv(Data_NADV) FMC_NADV high to Data valid - THCLK +4 th(Data_NWE) Data hold time after FMC_NWE high THCLK +0.5 - Table 95. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings(1)(2) 1. CL = 30 pF. 2. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 9THCLK-0.5 9THCLK+2 ns tw(NWE) FMC_NWE low time 7THCLK-1.5 7THCLK+1.5 tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 6THCLK+2 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 4THCLK-3 - |
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