STM32L471RG datasheet(52/218 Pages) STMICROELECTRONICS

52 / 218 page

Functional overview

STM32L471xx

52/218

DocID027226 Rev 1

•

Transmission

–

Three transmit mailboxes

–

Configurable transmit priority

•

Reception

–

Two receive FIFOs with three stages

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14 Scalable filter banks

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Identifier list feature

–

Configurable FIFO overrun

•

Time-triggered communication option

–

Disable automatic retransmission mode

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16-bit free running timer

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Time Stamp sent in last two data bytes

•

Management

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Maskable interrupts

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Software-efficient mailbox mapping at a unique address space

3.32

Secure digital input/output and MultiMediaCards Interface

(SDMMC)

The card host interface (SDMMC) provides an interface between the APB peripheral bus

and MultiMediaCards (MMCs), SD memory cards and SDIO cards.

The SDMMC features include the following:

•

Full compliance with MultiMediaCard System Specification Version 4.2. Card support

for three different databus modes: 1-bit (default), 4-bit and 8-bit

•

Full compatibility with previous versions of MultiMediaCards (forward compatibility)

•

Full compliance with SD Memory Card Specifications Version 2.0

•

Full compliance with SD I/O Card Specification Version 2.0: card support for two

different databus modes: 1-bit (default) and 4-bit

•

Data transfer up to 48 MHz for the 8 bit mode

•

Data write and read with DMA capability

3.33

Flexible static memory controller (FSMC)

The Flexible static memory controller (FSMC) includes two memory controllers:

•

The NOR/PSRAM memory controller

•

The NAND/memory controller

This memory controller is also named Flexible memory controller (FMC).

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