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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L471RG датащи(PDF) 160 Page - STMicroelectronics |
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STM32L471RG датащи(HTML) 160 Page - STMicroelectronics |
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160 / 218 page  Electrical characteristics STM32L471xx 160/218 DocID027226 Rev 1 Figure 26. 12-bit buffered / non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. . 3. Refer to Table 58: I/O static characteristics. 4. Ton is the Refresh phase duration. Toff is the Hold phase duration. Refer to RM0392 reference manual for more details. Table 70. DAC accuracy(1) Symbol Parameter Conditions Min Typ Max Unit DNL Differential non linearity (2) DAC output buffer ON - - ±2 LSB DAC output buffer OFF - - ±2 - monotonicity 10 bits guaranteed INL Integral non linearity(3) DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ -- ±4 DAC output buffer OFF CL ≤ 50 pF, no RL -- ±4 Offset Offset error at code 0x800(3) DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ VREF+ = 3.6 V - - ±12 VREF+ = 1.8 V - - ±25 DAC output buffer OFF CL ≤ 50 pF, no RL -- ±8 Offset1 Offset error at code 0x001(4) DAC output buffer OFF CL ≤ 50 pF, no RL -- ±5 OffsetCal Offset Error at code 0x800 after calibration DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ VREF+ = 3.6 V - - ±5 VREF+ = 1.8 V - - ±7 |
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