STM32L431 datasheet(28/200 Pages) STMICROELECTRONICS

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Functional overview

STM32L431xx

28/200

DocID028800 Rev 1

3.11

Clocks and startup

The clock controller (see Figure 3) distributes the clocks coming from different oscillators to

the core and the peripherals. It also manages clock gating for low-power modes and

ensures clock robustness. It features:

•

Clock prescaler: to get the best trade-off between speed and current consumption,

the clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler

•

Safe clock switching: clock sources can be changed safely on the fly in run mode

through a configuration register.

•

Clock management: to reduce power consumption, the clock controller can stop the

clock to the core, individual peripherals or memory.

•

System clock source: four different clock sources can be used to drive the master

clock SYSCLK:

–

4-48 MHz high-speed external crystal or ceramic resonator (HSE), that can supply

a PLL. The HSE can also be configured in bypass mode for an external clock.

–

16 MHz high-speed internal RC oscillator (HSI16), trimmable by software, that can

supply a PLL

–

Multispeed internal RC oscillator (MSI), trimmable by software, able to generate

12 frequencies from 100 kHz to 48 MHz. When a 32.768 kHz clock source is

available in the system (LSE), the MSI frequency can be automatically trimmed by

hardware to reach better than ±0.25% accuracy. The MSI can supply a PLL.

–

System PLL which can be fed by HSE, HSI16 or MSI, with a maximum frequency

at 80 MHz.

•

RC48 with clock recovery system (HSI48): internal RC48 MHz clock source can be

used to drive the SDMMC or the RNG peripherals. This clock can be output on the

MCO.

•

Auxiliary clock source: two ultralow-power clock sources that can be used to drive

the real-time clock:

–

32.768 kHz low-speed external crystal (LSE), supporting four drive capability

modes. The LSE can also be configured in bypass mode for an external clock.

–

32 kHz low-speed internal RC (LSI), also used to drive the independent watchdog.

The LSI clock accuracy is ±5% accuracy.

•

Peripheral clock sources: Several peripherals (SDMMC, RNG, SAI, USARTs, I2Cs,

LPTimers, ADC, SWPMI) have their own independent clock whatever the system clock.

Two PLLs, each having three independent outputs allowing the highest flexibility, can

generate independent clocks for the ADC, the SDMMC/RNG and the SAI.

•

Startup clock: after reset, the microcontroller restarts by default with an internal 4 MHz

clock (MSI). The prescaler ratio and clock source can be changed by the application

program as soon as the code execution starts.

•

Clock security system (CSS): this feature can be enabled by software. If a HSE clock

failure occurs, the master clock is automatically switched to HSI16 and a software

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