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STM32F383VC датащи(PDF) 96 Page - STMicroelectronics

номер детали STM32F383VC
подробное описание детали  Reset and power management
PDF  125 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32F383VC датащи(HTML) 96 Page - STMicroelectronics

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Electrical characteristics
STM32F383xx
96/125
DocID023367 Rev 2
Equation 1: RSRC max formula
The formula above (Equation 1) is used to determine the maximum external signal source
impedance allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Table 59. RSRC max for fADC = 14 MHz(1)
1. Guaranteed by design, not tested in production.
Ts (cycles)
tS (µs)
RSRC max (kΩ)
1.5
0.11
0.4
7.5
0.54
5.9
13.5
0.96
11.4
28.5
2.04
25.2
41.5
2.96
37.2
55.5
3.96
50
71.5
5.11
50
239.5
17.1
50
Table 60. ADC accuracy(1)(2) (3)
1. ADC DC accuracy values are measured after internal calibration.
Symbol
Parameter
Test conditions
Typ
Max(4)
Unit
ET
Total unadjusted error
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 3 V to 3.6 V
TA = 25 °C
±1.3
±3
LSB
EO
Offset error
±1
±2
EG
Gain error
±0.5
±1.5
ED
Differential linearity error
±0.7
±1
EL
Integral linearity error
±0.8
±1.5
ET
Total unadjusted error
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 2.7 V to 3.6 V
TA = -40 to 105 °C
±3.3
±4
LSB
EO
Offset error
±1.9
±2.8
EG
Gain error
±2.8
±3
ED
Differential linearity error
±0.7
±1.3
EL
Integral linearity error
±1.2
±1.7
ET
Total unadjusted error
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 2.4 V to 3.6 V
TA = 25 °C
±3.3
±4
LSB
EO
Offset error
±1.9
±2.8
EG
Gain error
±2.8
±3
ED
Differential linearity error
±0.7
±1.3
EL
Integral linearity error
±1.2
±1.7
RSRC
T
S
f
ADC
C
ADC
2
N2
+
()
ln
×
×
--------------------------------------------------------------
R
ADC
–
<



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