STM32F398VE datasheet(97/151 Pages) STMICROELECTRONICS

номер детали	STM32F398VE

подробное описание детали	CRC calculation unit

PDF	151 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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97 / 151 page

DocID027227 Rev 2

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STM32F398VE

Electrical characteristics

142

Table 50. Synchronous multiplexed PSRAM write timings(1) (2)

1. Based on characterization, not tested in production

2. CL = 30 pF.

Symbol

Parameter

Min

Max

Unit

tw(CLK)

FMC_CLK period, VDD range= 2.7 to 3.6

4THCLK-1

td(CLKL-NExL)

FMC_CLK low to FMC_NEx low (x=0..2)

5.5

td(CLKH-NExH)

FMC_CLK high to FMC_NEx high (x=

0…2)

THCLK+1

td(CLKL-NADVL)

FMC_CLK low to FMC_NADV low

td(CLKL-NADVH)

FMC_CLK low to FMC_NADV high

td(CLKL-AV)

FMC_CLK low to FMC_Ax valid

(x=16…25)

-0

td(CLKH-AIV)

FMC_CLK high to FMC_Ax invalid

(x=16…25)

td(CLKL-NWEL)

FMC_CLK low to FMC_NWE low

5.5

td(CLKH-NWEH)

FMC_CLK high to FMC_NWE high

THCLK+1

td(CLKL-ADV)

FMC_CLK low to FMC_AD[15:0] valid

7.5

td(CLKL-ADIV)

FMC_CLK low to FMC_AD[15:0] invalid

td(CLKL-DATA)

FMC_A/D[15:0] valid data after

FMC_CLK low

-8

td(CLKL-NBLL)

FMC_CLK low to FMC_NBL low

td(CLKH-NBLH)

FMC_CLK high to FMC_NBL high

THCLK+1

tsu(NWAIT-CLKH)

FMC_NWAIT valid before FMC_CLK high

th(CLKH-NWAIT)

FMC_NWAIT valid after FMC_CLK high

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