ST72325AR7-Auto datasheet(105/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

16-bit timer

Doc ID 13770 Rev 3

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16-bit read sequence

The 16-bit read sequence (from either the Counter Register or the Alternate Counter

Figure 44.

16-bit read sequence

The user must read the MS Byte first; the LS Byte value is then buffered automatically.

This buffered value remains unchanged until the 16-bit read sequence is completed, even if

the user reads the MS Byte several times.

After a complete reading sequence, if only the CLR register or ACLR register are read, they

return the LS Byte of the count value at the time of the read.

Whatever timer mode is used (input capture, output compare, one pulse mode or PWM

mode) an overflow occurs when the counter rolls over from FFFFh to 0000h, after which

●

the TOF bit of the SR register is set

●

a timer interrupt is generated if

–

the TOIE bit of the CR1 register is set and

–

the I bit of the CC register is cleared

If one of these conditions is false, the interrupt remains pending to be issued as soon as

they are both true.

Clearing the overflow interrupt request is done in two steps:

Reading the SR register while the TOF bit is set

An access (read or write) to the CLR register

Note:

The TOF bit is not cleared by accesses to ACLR register. The advantage of accessing the

ACLR register rather than the CLR register is that it allows simultaneous use of the overflow

function and reading the free running counter at random times (for example, to measure

elapsed time) without the risk of clearing the TOF bit erroneously.

The timer is not affected by Wait mode.

In Halt mode, the counter stops counting until the mode is exited. Counting then resumes

from the previous count (MCU awakened by an interrupt) or from the reset count (MCU

awakened by a Reset).

is buffered

Read

At t0

Read

Returns the buffered

LS Byte value at t0

At t0 +Dt

Other

instructions

Beginning of the sequence

Sequence completed

LS Byte

MS Byte

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