ST72321BARX datasheet(21/187 Pages) STMICROELECTRONICS

21 / 187 page

ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx

21/187

5 CENTRAL PROCESSING UNIT

5.1 INTRODUCTION

This CPU has a full 8-bit architecture and contains

six internal registers allowing efficient 8-bit data

manipulation.

5.2 MAIN FEATURES

■ Enable executing 63 basic instructions

■ Fast 8-bit by 8-bit multiply

■ 17

main addressing modes (with indirect

addressing mode)

■ Two 8-bit index registers

■ 16-bit stack pointer

■ Low power HALT and WAIT modes

■ Priority maskable hardware interrupts

■ Non-maskable software/hardware interrupts

5.3 CPU REGISTERS

The six CPU registers shown in Figure 1 are not

present in the memory mapping and are accessed

by specific instructions.

Accumulator (A)

The Accumulator is an 8-bit general purpose reg-

ister used to hold operands and the results of the

arithmetic and logic calculations and to manipulate

data.

Index Registers (X and Y)

These 8-bit registers are used to create effective

addresses or as temporary storage areas for data

manipulation. (The Cross-Assembler generates a

precede instruction (PRE) to indicate that the fol-

lowing instruction refers to the Y register.)

The Y register is not affected by the interrupt auto-

matic procedures.

Program Counter (PC)

The program counter is a 16-bit register containing

the address of the next instruction to be executed

by the CPU. It is made of two 8-bit registers PCL

(Program Counter Low which is the LSB) and PCH

(Program Counter High which is the MSB).

Figure 9. CPU Registers

ACCUMULATOR

X INDEX REGISTER

Y INDEX REGISTER

STACK POINTER

CONDITION CODE REGISTER

PROGRAM COUNTER

1I1 H I0 N Z

RESET VALUE = RESET VECTOR @ FFFEh-FFFFh

PCH

PCL

RESET VALUE = STACK HIGHER ADDRESS

RESET VALUE = 1X

11X 1X X

RESET VALUE = XXh

X = Undefined Value

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