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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F296 датащи(PDF) 238 Page - STMicroelectronics |
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ST10F296 датащи(HTML) 238 Page - STMicroelectronics |
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238 / 346 page  Obsolete Product(s) - Obsolete Product(s) System reset ST10F296E 238/346 Table 133 and Figure 92 shows the start-up configurations and some system features that are selected on reset sequences. Table 133 describes the system configurations latched onto Port 0 in the six different reset modes. Figure 92 summarizes the state of the Port 0 bits latched in the RP0H, SYSCON, and BUSCON0 registers. Software reset(2) x 0 N Synch. Not activated 000 10 x 0 N Synch. Not activated 000 10 0 1 Y Synch. Not activated 000 10 1 1 Y Synch. Activated by internal logic for 1024 TCL 0 0 0 1 0 Watchdog reset(2) x 0 N Synch. Not activated 000 11 x 0 N Synch. Not activated 000 11 0 1 Y Synch. Not activated 000 11 1 1 Y Synch. Activated by internal logic for 1024 TCL 0 0 0 1 1 1. A software hardware reset can degenerate into a long hardware reset and is consequently flagged differently (see Section 20.3 for details). 2. When bidirectional reset is active (and RPD = 0), it can be followed by a short hardware reset and is consequently flagged differently (see Section 20.6 for details). Table 132. Reset events summary Event RSTIN WDTCON flags Min Max Table 133. Latched configurations of Port 0 for the different reset events(1) Sample event Port 0 Software reset - - - X XXXX XX - - ---- Watchdog reset - - - X XXXX XX - - ---- Synchronous short hardware reset - - - X XXXX XXXX XXXX Synchronous long hardware reset XXXX XXXX XXXX XXXX Asynchronous hardware reset XXXX XXXX XXXX XXXX Asynchronous power-on reset XXXX XXXX XXXX XXXX 1. X: Pin is sampled; -: Pin is not sampled. Obsolete Product(s) - Obsolete Product(s) |
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