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ST10F296 датащи(PDF) 164 Page - STMicroelectronics |
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ST10F296 датащи(HTML) 164 Page - STMicroelectronics |
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164 / 346 page ![]() Obsolete Product(s) - Obsolete Product(s) Parallel ports ST10F296E 164/346 ODP8 register XS1PORT register This register is enabled and visible only when the XPEN and XASCEN bits of the SYSCON and XPERCON registers respectively are set. However, when ASC1 is disabled, the standard P8, DP8 and ODP8 registers must be used to configure pins P8.6 and P8.7. ODP8 (F1D6h/EBh) ESFR Reset value: --00h 15 14 13 12 11 10 987 65432 10 --- ----- OD P8.7 OD P8.6 OD P8.5 OD P8.4 OD P8.3 OD P8.2 OD P8.1 OD P8.0 --- ----- RW RW RW RW RW RW RW RW Table 99. ODP8 register description Bit Bit name Function 7-0 ODP8.y Port open-drain control register ODP8 bit y 0: Port line P8.y output driver in push-pull mode 1: Port line P8.y output driver in open-drain mode XS1PORT (E980h) XBus Reset value: 0000h 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - --- --- --- XOD P8.7 X P8.7 XD P8.7 XOD P8.6 X P8.6 XD P8.6 - --- --- - - - RW RW RW RW RW RW Table 100. XS1PORT register description Bit Bit name Function 5, 2 XODP8.y Port open-drain control register bit y (y = 6, 7 only) 0: Port line P8.y output driver in push-pull mode 1: Port line P8.y output driver in open-drain mode 4, 1 XP8.y Port data register bit y (y = 6, 7 only) 3, 0 XDP8.y Port direction register bit y (y = 6, 7 only) 0: Port line P8.y is an input (high impedance) 1: Port line P8.y is an output Obsolete Product(s) - Obsolete Product(s) |
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