ST10F296 datasheet(160/346 Pages) STMICROELECTRONICS

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ODP7 register

13.9.2

Alternate functions of Port 7

The upper 4 lines of Port 7 (P7.7 to P7.4) are used as capture inputs or compare outputs

(CC31IO to CC28IO) for the CAPCOM2 unit.

Port 7 lines are connected to the CAPCOM2 unit and handled by software in a similar way to

Port 2 lines (see Section 13.4.2: Alternate functions of Port 2 on page 134.

The capture input function of pins P7.7 to P7.4 can be used as external interrupt inputs with

a sample rate of eight CPU clock cycles.

The lower 4 lines of Port 7 (P7.3 to P7.0) supports outputs of the PWM module (POUT3 to

POUT0). At these pins, the value of the respective port output latch is XORed with the value

of the PWM output rather than ANDed. This allows the alternate output value to be used as

it is (port latch holds a 0) or to be inverted at the pin (port latch holds a 1).

The PWM outputs must be enabled via the respective PENx bit in the PWMCON1 register.

Table 96 summarizes the alternate functions of Port 7.

ODP7 (F1D2h/E9h)

ESFR

Reset value: --00h

987

65432

---

-----

P7.7

P7.6

P7.5

P7.4

P7.3

P7.2

P7.1

P7.0

---

-----

Table 95.

ODP7 register description

Bit

Bit name

Function

7-0

ODP7.y

Port open-drain control register ODP7 bit y

0: Port line P7.y output driver in push-pull mode

1: Port line P7.y output driver in open-drain mode

Table 96.

Port 7 alternate functions

Port 7 pin

Alternate function

P7.0

P7.1

P7.2

P7.3

P7.4

P7.5

P7.6

P7.7

POUT0

POUT1

POUT2

POUT3

CC28 I/O

CC29 I/O

CC30 I/O

CC31 I/O

PWM mode channel 0 output

PWM mode channel 1 output

PWM mode channel 2 output

PWM mode channel 3 output

Capture input/compare output channel 28

Capture input/compare output channel 29

Capture input/compare output channel 30

Capture input/compare output channel 31

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