SPC560P50L5 datasheet(80/112 Pages) STMICROELECTRONICS

80 / 112 page

Electrical characteristics

SPC560P44Lx, SPC560P50Lx

80/112

Doc ID 14723 Rev 9

The filter at the input pins must be designed taking into account the dynamic characteristics

of the input signal (bandwidth) and the equivalent input impedance of the ADC itself.

In fact a current sink contributor is represented by the charge sharing effects with the

sampling capacitance: CS and CP2 being substantially two switched capacitances, with a

frequency equal to the ADC conversion rate, it can be seen as a resistive path to ground.

For instance, assuming a conversion rate of 1 MHz, with CS+CP2 equal to 3 pF, a resistance

of 330 k

Ω is obtained (REQ = 1 / (fc × (CS+CP2)), where fc represents the conversion rate at

the considered channel). To minimize the error induced by the voltage partitioning between

this resistance (sampled voltage on CS+CP2) and the sum of RS + RF, the external circuit

must be designed to respect the Equation 4:

Equation 4

Equation 4 generates a constraint for external network design, in particular on resistive

path.

Figure 16.

Input equivalent circuit

---------------------

•

---LSB

RSW1

CP2

VDD

Sampling

Source

Filter

Current Limiter

EXTERNAL CIRCUIT

INTERNAL CIRCUIT SCHEME

CP1

RAD

Channel

Selection

RS: Source impedance

RF: Filter resistance

CF: Filter capacitance

RL: Current limiter resistance

RSW1: Channel selection switch impedance

RAD: Sampling switch impedance

CP: Pin capacitance (two contributions, CP1 and CP2)

CS: Sampling capacitance

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