L6751C datasheet(14/57 Pages) STMICROELECTRONICS

14 / 57 page

Pin description and connection diagrams

L6751C

14/57

DocID025037 Rev 1

2.2

Thermal data

Table 3. Thermal data

A34

SVR_RDY

(PWROK)

VR Ready (Intel mode). Open drain output set free after SS has finished and

pulled low when triggering any protection for the single-phase section. Pull up

to a voltage lower than 3.3 V (typ.), if not used it can be left floating.

PowerOK (AMD mode). System-wide Power Good input. When low, the

device decodes SVC and SVD to determine the boot voltage.

B31

ENDRV

Enable driver.

CMOS output driven high when the IC commands the drivers. Used in

conjunction with the Hi-Z window on the PWMx pins to optimize the multi-

phase section overall efficiency. Connect directly to external driver enable pin.

A35

PWM6

PWM output.

Connect to related multi-phase channel external driver PWM input. During

normal operation the device is able to manage Hi-Z status by setting and

holding the PWMx pin to fixed voltage defined before. See Table 7 on page 20

for phase number programming.

B32

PWM5

A36

PWM4

PAD

GND

GND connection. All internal references and logic are referenced to this pin.

Filter to VCC with proper MLCC capacitor and connect to the PCB GND

plane.

1. D = digital, A = analog.

Table 2. Pin description (continued)

Pin no.

Name

Type

Function

Symbol

Parameter

Value

Unit

RTHJA

Thermal resistance junction-to-ambient

(device soldered on 2s2p PC board)

°C/W

RTHJC

Thermal resistance junction-to-case

°C/W

TMAX

Maximum junction temperature

150

°C

TSTG

Storage temperature range

-40 to 150

°C

Junction temperature range

0 to 125

°C

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