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STU7N65M2 датащи(PDF) 4 Page - STMicroelectronics

номер детали STU7N65M2
подробное описание детали  N-channel 650 V, 0.98 Ω typ., 5 A MDmesh™M2 Power MOSFETs in TO-220 and IPAK packages
PDF  18 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STU7N65M2 датащи(HTML) 4 Page - STMicroelectronics

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Electrical characteristics
STP7N65M2, STU7N65M2
4/18
DocID026788 Rev 3
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5: On /off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source breakdown
voltage
VGS = 0, ID = 1 mA
650
V
IDSS
Zero gate voltage
drain current
VGS = 0, VDS = 650 V
1
µA
VGS = 0, VDS = 650 V,
TC=125 °C
100
µA
IGSS
Gate-body leakage
current
VDS = 0, VGS = ± 25 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
2
3
4
V
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 2.5 A
0.98
1.15
Ω
Table 6: Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Ciss
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0
-
270
-
pF
Coss
Output capacitance
-
14.5
-
Crss
Reverse transfer
capacitance
-
0.8
-
C
oss eq.
(1)
Equivalent output
capacitance
VDS = 0 to 520 V, VGS = 0
-
108
-
pF
RG
Intrinsic gate resistance
f = 1 MHz open drain
-
7
-
Ω
Qg
Total gate charge
VDD = 520 V, ID = 5 A,
VGS = 10 V
(see Figure 17: "Gate charge
test circuit")
-
9
-
nC
Qgs
Gate-source charge
-
2.3
-
nC
Qgd
Gate-drain charge
-
4.3
-
nC
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7: Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on
delay time
VDD = 325 V, ID = 2.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 16: "Switching times test circuit
for resistive load"and Figure 21: "Switching
time waveform" )
-
8
-
ns
tr
Rise time
-
20
-
ns
td(off)
Turn-off
delay time
-
30
-
ns
tf
Fall time
-
20
-
ns



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