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L4984D датащи(PDF) 17 Page - STMicroelectronics |
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L4984D датащи(HTML) 17 Page - STMicroelectronics |
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17 / 35 page ![]() DocID024474 Rev 1 17/35 L4984D Application information Figure 26. Line-modulated fixed-off-time modulator: a) internal block diagram; b) key waveforms With reference to the schematic and the relevant key waveforms in Figure 26, an off-time proportional to the instantaneous line voltage is achieved by charging the capacitor CT with a constant current ITIMER, accurately fixed internally and temperature compensated, while the MOSFET is off and commanding MOSFET turn-on (and resetting CT at zero) as the voltage across CT equals that on the MULT pin. The voltage on this pin is: Equation 5 where KP is the divider ratio of the resistors biasing the MULT pin. As a result: Equation 6 and the switching frequency is: Equation 7 The timing capacitor CT, therefore, is selected with the following design formula: Equation 8 Vout and fsw are design specifications, KP is chosen so that the voltage on the MULT pin is within the multiplier linearity range (0 to 3 V) and ITIMER is specified in Section 3: Electrical characteristics . AM13242v1 MULT - + C T ITimer OFF ON 0 TIMER Q S R + - PWM Comparator Driver PWM Latch GD CS COMP Multiplier GD CS S R Q TOFF TON Multiplier output MULT TIMER t t t t t t a) b) θ = sin Vpk K V P MULT P TIMER T t P TIMER T OFF K I C K sin θ Vpk K I C T = → = Vout K 1 Vout C K I T 1 f t T P TIMER sw sw = = = sw P TIMER T f Vout K I C = |
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