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STIPN2M50-H датащи(PDF) 10 Page - STMicroelectronics |
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STIPN2M50-H датащи(HTML) 10 Page - STMicroelectronics |
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10 / 21 page ![]() Electrical characteristics STIPN2M50-H 10/21 DocID030065 Rev 4 Table 12: Op-amp characteristics (VCC = 15 V unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Vio Input offset voltage Vic = 0 V, Vo = 7.5 V 6 mV Iio Input offset current Vic = 0 V, Vo = 7.5 V 4 40 nA Iib Input bias current (1) 100 200 nA VOL Low level output voltage RL = 10 kΩ to VCC 75 150 mV VOH High level output voltage RL = 10 kΩ to GND 14 14.7 V Io Output short-circuit current Source, Vid = +1 V; Vo = 0 V 16 30 mA Sink, Vid = -1 V; Vo = VCC 50 80 mA SR Slew rate Vi = 1 - 4 V; CL = 100 pF; unity gain 2.5 3.8 V/µs GBWP Gain bandwidth product Vo = 7.5 V 8 12 MHz Avd Large signal voltage gain RL = 2 kΩ 70 85 dB SVR Supply voltage rejection ratio vs. VCC 60 75 dB CMRR Common mode rejection ratio 55 70 dB Notes: (1)The direction of the input current is out of the IC. Table 13: Sense comparator characteristics (VCC = 15 V unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Iib Input bias current VCIN = 1 V 3 µA Vod Open-drain low level output voltage Iod = 3 mA 0.5 V RON_OD Open-drain low level output resistance Iod = 3 mA 166 Ω RPD_SD SD ̅̅̅̅ pull-down resistor (1) 125 kΩ td_comp Comparator delay SD ̅̅̅̅/OD pulled to 5 V through 100 kΩ resistor 90 130 ns SR Slew rate CL = 180 pF; Rpu = 5 kΩ 60 V/µs tsd Shutdown to high / low-side driver propagation delay VOUT = 0, Vboot = VCC, VIN = 0 to 3.3 V 50 125 200 ns tisd Comparator triggering to high / low-side driver turn-off propagation delay Measured applying a voltage step from 0 V to 3.3 V to pin CIN 50 200 250 Notes: (1)Equivalent values as a result of the resistances of three drivers in parallel. |
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