PC87309VLJ datasheet(136/192 Pages) NSC

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Enhanced Serial Port - UART1 (Logical Device 3)

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6.0

Enhanced Serial Port - UART1

(Logical Device 3)

UART1 supports serial data communications with a remote

peripheral device or modem using a wired interface. The

module can function as a standard 16450 or 16550, or as

an Extended UART.

This module provides receive and transmit channels that

can operate concurrently in full-duplex mode. This module

performs all functions required to conduct parallel data in-

terchange with the system and composite serial data ex-

change with the external data channel, including:

Format conversion between the internal parallel data

format and the external programmable composite seri-

al format. See Figure 6-2.

Serial data timing generation and recognition.

Parallel data interchange with the system using a

choice of bi-directional data transfer mechanisms.

Status monitoring for all phases of communications

activity.

Existing 16550-based legacy software is completely and

transparently supported. Module organization and specific

fallback mechanisms switch the module to 16550 compatibil-

ity mode upon reset or when initialized by 16550 software.

6.1

Four register banks, each containing eight registers, control

UART operation. All registers use the same 8-byte address

space to indicate offsets 00h through 07h, and the active

bank must be selected by the software.

The register bank organization enables access to the banks

as required for activation of all module modes, while main-

taining transparent compatibility with 16450 or 16550 soft-

ware, which activates only the registers and specific bits

used in those devices. For details, See Section 6.2.

The Bank Selection Register (BSR) selects the active bank

and is common to all banks. See Figure 6-1. Therefore,

each bank defines seven new registers.

FIGURE 6-1. Register Bank Architecture

The default bank selection after system reset is 0, which

places the module in the UART 16550 mode. Additionally,

setting the baud in bank 1 (as required to initialize the 16550

UART) switches the module to a Non-Extended UART

mode. This ensures that running existing 16550 software

will switch the system to the 16550 configuration without

software modification.

Table 6-1 shows the main functions of the registers in each

bank.

TABLE 6-1. Register Bank Summary

Banks 0 and 1 are the 16550 register banks. The registers

in these banks are equivalent to the registers contained

in the 16550 UARTs and are accessed by 16550 soft-

ware drivers as if the module was a 16550. Bank 1 con-

tains the legacy Baud Generator Divisor Ports. Bank 0

registers control all other aspects of the UART function,

including data transfers, format setup parameters, inter-

rupt setup and status monitoring.

Bank 2 contains the non-legacy Baud Generator Divisor

Ports, and controls the extended features special to this

UART, that are not included in the 16550 repertoire. See

”Extended UART Mode” on page 137.

Bank 3 contains the Module Revision ID and shadow regis-

ters. The Module Revision ID (MRID) register contains

a code that identifies the revision of the module when

read by software. The shadow registers contain the

identical content as reset-when-read registers within

bank 0. Reading their contents from the shadow regis-

ters lets the system read the register content without re-

setting them.

6.2

DETAILED DESCRIPTION

The module provides receive and transmit channels that

can operate concurrently in full-duplex mode. This module

performs all functions required to conduct parallel data in-

terchange with the system and composite serial data ex-

change with the external data channel, including:

Format conversion between the internal parallel data

format and the external programmable composite seri-

al format. See Figure 6-2.

Serial data timing generation and recognition

Parallel data interchange with the system using a

choice of bi-directional data transfer mechanisms

Status monitoring for all phases of the communica-

tions activity

The module supplies modem control registers, and a prior-

itized interrupt system for efficient interrupt handling.

BANK 0

BANK 1

BANK 2

BANK 3

Offset 07h

Offset 06h

Offset 05h

Offset 04h

LCR/BSR

Offset 02h

Offset 01h

Offset 00h

Common

Throughout

All Banks

16550 Banks

Bank

Main Functions

Global Control and Status

Legacy Bank

Baud Generator Divisor,

Extended Control and Status

Module Revision ID and

Shadow Registers

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