PC87309VLJ datasheet(128/192 Pages) NSC

128 / 192 page

Enhanced Serial Port with IR -UART2 (Logical Device 2)

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TABLE 5-26. Consumer-IR Carrier Frequency Encoding

TABLE 5-27. Carrier Clock Pulse Width Options

5.18.3

Consumer-IR Configuration Register (RCCFG)

This register control the basic operation of the Consumer-

IR mode. After reset, the content of this register is 00h.

Bits 1,0 - Transmitter Modulator Mode (RC_MMD(1,0))

Determines how infrared pulses are generated from the

transmitted bit string. (see Table 5-28).

TABLE 5-28. Transmitter Modulation Mode Selection

Bit 2 - Transmitter Subcarrier Frequency Select (TXHSC)

This bit selects the modulation carrier frequency range.

0: Low frequency: 30-56.9 KHz

1: High frequency: 400-480 KHz

Bit 3 - Reserved

Read/Write 0.

Bit 4 - Receiver Demodulation Disable (RCDM_DS)

When this bit is 1, the internal demodulator is disabled.

The internal demodulator, when enabled, performs car-

rier frequency checking and envelope detection.

This bit must be set to 1 (disabled), when the demodu-

lation is performed externally, or when oversampling

mode is selected to determine the carrier frequency.

0: Internal demodulation enabled.

1: Internal demodulation disabled.

Bit 5 - Receiver Carrier Frequency Select (RXHSC)

This bit selects the receiver demodulator frequency range.

0: Low frequency: 30-56.9 KHz

1: High frequency: 400-480 KHz

Bit 6 - Receiver Sampling Mode Select(T_OV)

0: Programmed-T-period sampling.

Encoding

MCFR Bits

43210

Low Frequency

(TXHSC = 0)

High Frequency

(TXHSC = 1)

00000

reserved

00001

reserved

00010

reserved

00011

30 KHz

400 KHz

00100

31 KHz

reserved

00101

32 KHz

reserved

00110

33 KHz

reserved

00111

34 KHz

reserved

01000

35 KHz

450 KHz

01001

36 KHz

reserved

01010

37 KHz

reserved

01011

38 KHz

480 KHz

01100

39 KHz

reserved

01101

40 KHz

reserved

01110

41 KHz

reserved

. . .

11010

53 KHz

reserved

11011

54 KHz

reserved

11100

55 KHz

reserved

11101

56 KHz

reserved

11110

56.9 KHz

reserved

11111

reserved

Encoding

MCPW Bits

7 6 5

Low Frequency

(TXHSC = 0)

High Frequency

(TXHSC = 1)

0 0 0

Reserved

0 0 1

Reserved

0 1 0

µsec

0.7

µsec

0 1 1

µsec

0.8

µsec

1 0 0

µsec

0.9

µsec

1 0 1

10.6

µsec

Reserved

1 1 0

Reserved

1 1 1

Reserved

RCCFG

Bits

1 0

Modulation Mode

0 0

C_PLS Modulation mode. Pulses are

generated continuously for the entire logic

0 bit time.

0 1

8_PLS Modulation Mode. 8 pulses are

generated each time one or more logic 0

bits are transmitted following a logic 1 bit.

1 0

6_PLS Modulation Mode. 6 pulses are

generated each time one or more logic 0

bits are transmitted following a logic 1 bit.

1 1

Reserved. Result is indeterminate.

76543210

Reset

Required

Configuration Register

(RCCFG)

Bank 7,

Consumer-IR

RCDM_DS

Reserved

RXHSC

T_OV

R_LEN

RC_MMD0

RC_MMD1

TXHSC

Offset 02h

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