LSM303D datasheet(17/52 Pages) STMICROELECTRONICS

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LSM303D

Functionality

4.1

Self-test

The self-test allows checking the linear acceleration sensor functionality without moving the

sensor. The self-test function is off when the self-test bit (AST) is programmed to ‘0‘. When

the self-test bit is programmed to ‘1’, an actuation force is applied to the sensor, simulating a

definite input acceleration. In this case the sensor outputs exhibit a change in their DC

levels which are related to the selected full scale through the device sensitivity. When the

self-test is activated, the device output level is given by the algebraic sum of the signals

produced by the acceleration acting on the sensor and by the electrostatic test-force. If the

output signals change within the amplitude specified inside Section 2.1, then the sensor is

working properly and the parameters of the interface chip are within the defined

specifications.

4.2

Temperature sensor

The LSM303D features an internal temperature sensor. Temperature data can be enabled

by setting the TEMP_EN bit on the CTRL5 (24h) register to 1.

Both the TEMP_OUT_H and TEMP_OUT_L registers must be read.

Temperature data is stored inside TEMP_OUT_L (05h), TEMP_OUT_H (06h) as two’s

complement data in 12-bit format, right-justified.

The output data rate of the temperature sensor is set by M_ODR [2:0] in CTRL5 (24h) and is

equal to the magnetic sensor output data rate.

4.3

FIFO

The LSM303D embeds an acceleration data FIFO for each of the three output channels, X,

Y and Z. This allows consistent power saving for the system, as the host processor does not

need to continuously poll data from the sensor, but it can wake up only when needed and

burst the significant data out from the FIFO. This buffer can work according to four different

modes: Bypass mode, FIFO mode, Stream mode and Stream-to-FIFO mode. Each mode is

selected by the FIFO_MODE bits. Programmable threshold level, FIFO_empty or FIFO_Full

events can be enabled to generate dedicated interrupts on the INT 1 or INT 2 pin.

Bypass mode

In Bypass mode, the FIFO is not operational and for this reason it remains empty. As

described in Figure 5, for each channel only the first address is used. The remaining FIFO

slots are empty.

FIFO mode

In FIFO mode, data from X, Y and Z channels are stored in the FIFO. A FIFO threshold

interrupt can be enabled in order to be raised when the FIFO is filled to the level specified by

the internal register. The FIFO continues filling until it is full. When full, the FIFO stops

collecting data from the input channels.

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