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LT5546 датащи(PDF) 9 Page - Linear Technology |
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LT5546 датащи(HTML) 9 Page - Linear Technology |
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9 / 12 page ![]() LT5546 9 5546f APPLICATIO S I FOR ATIO extended gain control range of –23dB to 57dB. The VCTRL pin is a very sensitive input because of its high input impedance and therefore should be well shielded. Signal pickup on the VCTRL pin can lead to spurs and increased noise floor in the I/Q baseband outputs. It can degrade the linearity performance and it can cause asymmetry in the two-tone test. If control speed is not important, 1 µF bypass capacitors are recommended between VCTRL and ground. A fast responding peak detector is connected to the VGA input, sensitive to signal levels above the signal levels where the VGA is operating in the linear range. It is active from –22dBm up to 5dBm IF input signal levels. The DC output voltage of this detector (IF DET) can be used by the baseband controller to quickly determine the presence of a strong input level at the desired channel, and adjust gain accordingly. Figure 3a shows the simplified circuit sche- matic of the IF DET output. I/Q Demodulators The quadrature demodulators are double balanced mix- ers, down-converting the amplified IF signal from the VGA into I/Q baseband signals. The quadrature LO signals are generated internally from a double frequency external CW signal. The nominal output voltage of the differential I/Q baseband signals should be set to 0.8VP-P or lower, depending on the linearity requirements. The magnitudes of I and Q are well matched and their phases are 90 ° apart. Quadrature LO Generator The quadrature LO generator consists of a divide-by-two circuit and LO buffers. An input signal (2xLO) with twice the desired IF signal frequency is used as the clock for the divide-by-two circuit, producing the quadrature LO signals for the demodulators. The outputs are buffered and then drive the down-converting mixers. With a fully differential approach, the quadrature LO signals are well matched. Second harmonic content (or higher order even harmon- ics) in the external 2xLO signal can degrade the 90 ° phase shift between I and Q. Therefore, such content should be minimized. In disable or standby mode, the divide-by-two stage is powered down. After enabling the circuit, the phase relation between the IF signal and the baseband (I or Q) signals can be either 0 ° or 180°, since the circuit cannot distinguish between the two subsequent identical sinusoi- dal waveforms of the 2xLO input signal. The phase rela- tion between I and Q is always 90 °, i.e. I always leads Q by 90 °. Figure 3b shows the simplified circuit schematic of the 2xLO inputs. Depending on the application, different 2xLO input matching networks can be chosen. In Figure 4, three examples are given. The first network provides the best 2xLO input sensitivity because it can boost the 2xLO differential input signal using a narrow-band resonant ap- proach. The second network gives a wide-band match, but the 2xLO input sensitivity is about 2dB lower. The third network gives a simple and less expensive wide-band match, but 2xLO input sensitivity drops by about 9dB. The IF input sensitivity doesn’t change significantly using any of the three 2xLO matching networks. Baseband Circuit The baseband circuit consists of I/Q low-pass filters, I/Q hard limiters (clippers) and I/Q output buffers. The hard limiters operate as linear amplifiers normally. However, if a high level input temporarily overloads a linear amplifier, then the circuit will limit symmetrically, which will help to prevent the output buffer from overloading. This speeds Figure 3a. Simplified Circuit Schematic of the IF DET Output and Figure 3b. The 2xLO Inputs 3.8k 1k 8k 8k 5546 F03 IF DET VCC VCC + – 400mV 2xLO+ 2xLO– (3a) (3b) Figure 4. 2xLO Input Matching Networks for 4a) Narrow Band Tuned to 570MHz, 4b) Wide Band, 4c) Single-Ended Wide Band 39nH 5546 F04 TO 2xLO+ TO 2xLO+ TO 2xLO– TO 2xLO– 2xLO INPUT 2xLO INPUT 2xLO INPUT 240 Ω 1:4 3.3pF 100pF 100pF 3.3pF 56 Ω (4a) (4b) (4c) TO 2xLO+ TO 2xLO– |
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